derek.holloway
7502bf64a4
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53 lines
1.5 KiB
ArmAsm
53 lines
1.5 KiB
ArmAsm
# The longjump pass may consider branch targets in range during tentative
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# layout and decide not to insert stubs for them. Later, final section
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# allocation may insert alignment padding after the last non-cold text section
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# when hugify is enabled. This moves the following cold section farther away,
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# resulting in relocation fixups going out of range at JITLink. Check that the
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# longjump pass accounts for this padding and inserts stubs when needed.
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# REQUIRES: system-linux, asserts, bolt-runtime, target=aarch64{{.*}}
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# RUN: %clang %cflags -Wl,-q %s -o %t
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# RUN: link_fdata --no-lbr %s %t %t.fdata
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# RUN: llvm-strip --strip-unneeded %t
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# RUN: llvm-bolt %t -o %t.bolt --data %t.fdata -split-functions --hugify
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# RUN: llvm-objdump -d %t.bolt | FileCheck %s
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.globl foo
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.type foo, %function
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foo:
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.entry_foo:
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# FDATA: 1 foo #.entry_foo# 10
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cbz x0, .Lcold_foo
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mov x0, #1
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.Lcold_foo:
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ret
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.globl main
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.type main, %function
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main:
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mov w0, wzr
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ret
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.globl _start
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.type _start, %function
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_start:
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bl main
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b .
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## Force relocation mode.
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.reloc 0, R_AARCH64_NONE
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# CHECK: Disassembly of section .text:
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# CHECK: <foo>:
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# CHECK-NEXT: {{.*}} cbnz x0, 0x[[ADDR0:[0-9a-f]+]] <{{.*}}>
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# CHECK-NEXT: {{.*}} b 0x[[ADDR1:[0-9a-f]+]] <{{.*}}>
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# CHECK-NEXT: [[ADDR0]]: {{.*}} b 0x[[ADDR2:[0-9a-f]+]] <{{.*}}>
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# CHECK: Disassembly of section .text.cold:
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# CHECK: <foo.cold.0>:
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# CHECK-NEXT: [[ADDR2]]: {{.*}} mov x0, #0x1 // =1
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# CHECK-NEXT: [[ADDR1]]: {{.*}} ret
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