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198 lines
6.4 KiB
C++
198 lines
6.4 KiB
C++
//===--- AVR.h - Declare AVR target feature support -------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares AVR TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_AVR_H
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#define LLVM_CLANG_LIB_BASIC_TARGETS_AVR_H
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#include "clang/Basic/TargetInfo.h"
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#include "clang/Basic/TargetOptions.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/TargetParser/Triple.h"
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namespace clang {
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namespace targets {
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// AVR Target
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class LLVM_LIBRARY_VISIBILITY AVRTargetInfo : public TargetInfo {
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public:
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AVRTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
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: TargetInfo(Triple) {
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TLSSupported = false;
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PointerWidth = 16;
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PointerAlign = 8;
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ShortWidth = 16;
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ShortAlign = 8;
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IntWidth = 16;
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IntAlign = 8;
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LongWidth = 32;
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LongAlign = 8;
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LongLongWidth = 64;
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LongLongAlign = 8;
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SuitableAlign = 8;
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DefaultAlignForAttributeAligned = 8;
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HalfWidth = 16;
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HalfAlign = 8;
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FloatWidth = 32;
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FloatAlign = 8;
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DoubleWidth = 32;
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DoubleAlign = 8;
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DoubleFormat = &llvm::APFloat::IEEEsingle();
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LongDoubleWidth = 32;
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LongDoubleAlign = 8;
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LongDoubleFormat = &llvm::APFloat::IEEEsingle();
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SizeType = UnsignedInt;
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PtrDiffType = SignedInt;
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IntPtrType = SignedInt;
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Char16Type = UnsignedInt;
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WIntType = SignedInt;
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Int16Type = SignedInt;
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Char32Type = UnsignedLong;
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SigAtomicType = SignedChar;
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resetDataLayout();
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}
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void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const override;
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llvm::SmallVector<Builtin::InfosShard> getTargetBuiltins() const override {
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return {};
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}
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bool allowsLargerPreferedTypeAlignment() const override { return false; }
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BuiltinVaListKind getBuiltinVaListKind() const override {
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return TargetInfo::VoidPtrBuiltinVaList;
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}
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std::string_view getClobbers() const override { return ""; }
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ArrayRef<const char *> getGCCRegNames() const override {
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static const char *const GCCRegNames[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8",
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"r9", "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17",
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"r18", "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26",
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"r27", "r28", "r29", "r30", "r31", "__SP_L__", "__SP_H__"};
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return llvm::ArrayRef(GCCRegNames);
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}
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ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
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return {};
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}
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ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override {
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static const TargetInfo::AddlRegName AddlRegNames[] = {
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{{"xl", "X"}, 26}, {{"xh"}, 27}, {{"yl", "Y"}, 28},
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{{"yh"}, 29}, {{"zl", "Z"}, 30}, {{"zh"}, 31}};
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return llvm::ArrayRef(AddlRegNames);
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}
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bool validateAsmConstraint(const char *&Name,
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TargetInfo::ConstraintInfo &Info) const override {
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// There aren't any multi-character AVR specific constraints.
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if (StringRef(Name).size() > 1)
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return false;
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switch (*Name) {
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default:
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return false;
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case 'a': // Simple upper registers
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case 'b': // Base pointer registers pairs
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case 'd': // Upper register
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case 'l': // Lower registers
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case 'e': // Pointer register pairs
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case 'q': // Stack pointer register
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case 'r': // Any register
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case 'w': // Special upper register pairs
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case 't': // Temporary register
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case 'x':
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case 'X': // Pointer register pair X
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case 'y':
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case 'Y': // Pointer register pair Y
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case 'z':
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case 'Z': // Pointer register pair Z
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Info.setAllowsRegister();
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return true;
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case 'I': // 6-bit positive integer constant
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// Due to issue https://github.com/llvm/llvm-project/issues/51513, we
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// allow value 64 in the frontend and let it be denied in the backend.
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Info.setRequiresImmediate(0, 64);
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return true;
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case 'J': // 6-bit negative integer constant
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Info.setRequiresImmediate(-63, 0);
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return true;
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case 'K': // Integer constant (Range: 2)
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Info.setRequiresImmediate(2);
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return true;
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case 'L': // Integer constant (Range: 0)
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Info.setRequiresImmediate(0);
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return true;
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case 'M': // 8-bit integer constant
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Info.setRequiresImmediate(0, 0xff);
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return true;
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case 'N': // Integer constant (Range: -1)
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Info.setRequiresImmediate(-1);
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return true;
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case 'O': // Integer constant (Range: 8, 16, 24)
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Info.setRequiresImmediate({8, 16, 24});
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return true;
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case 'P': // Integer constant (Range: 1)
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Info.setRequiresImmediate(1);
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return true;
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case 'R': // Integer constant (Range: -6 to 5)
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Info.setRequiresImmediate(-6, 5);
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return true;
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case 'G': // Floating point constant 0.0
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Info.setRequiresImmediate(0);
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return true;
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case 'Q': // A memory address based on Y or Z pointer with displacement.
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return true;
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}
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return false;
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}
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IntType getIntTypeByWidth(unsigned BitWidth, bool IsSigned) const final {
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// AVR prefers int for 16-bit integers.
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return BitWidth == 16 ? (IsSigned ? SignedInt : UnsignedInt)
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: TargetInfo::getIntTypeByWidth(BitWidth, IsSigned);
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}
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IntType getLeastIntTypeByWidth(unsigned BitWidth, bool IsSigned) const final {
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// AVR uses int for int_least16_t and int_fast16_t.
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return BitWidth == 16
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? (IsSigned ? SignedInt : UnsignedInt)
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: TargetInfo::getLeastIntTypeByWidth(BitWidth, IsSigned);
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}
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bool isValidCPUName(StringRef Name) const override;
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void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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bool setCPU(const std::string &Name) override;
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std::optional<std::string> handleAsmEscapedChar(char EscChar) const override;
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StringRef getABI() const override { return ABI; }
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std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override {
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return std::make_pair(32, 32);
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}
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protected:
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std::string CPU;
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StringRef ABI;
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StringRef DefineName;
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StringRef Arch;
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int NumFlashBanks = 0;
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};
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} // namespace targets
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} // namespace clang
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#endif // LLVM_CLANG_LIB_BASIC_TARGETS_AVR_H
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