derek.holloway
7502bf64a4
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266 lines
15 KiB
C++
266 lines
15 KiB
C++
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++17 -fclangir -emit-cir -mmlir -mlir-print-ir-before=cir-cxxabi-lowering %s -o %t.cir 2> %t-before.cir
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// RUN: FileCheck --check-prefix=CIR-BEFORE --input-file=%t-before.cir %s
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// RUN: FileCheck --check-prefixes=CIR-AFTER,CIR-AFTER-X86 --input-file=%t.cir %s
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++17 -fclangir -emit-llvm %s -o %t-cir.ll
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// RUN: FileCheck --input-file=%t-cir.ll --check-prefixes=LLVM,LLVM-X86 %s
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++17 -emit-llvm %s -o %t.ll
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// RUN: FileCheck --input-file=%t.ll --check-prefixes=OGCG,OGCG-X86 %s
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// RUN: %clang_cc1 -triple aarch64-unknown-linux-gnu -std=c++17 -fclangir -emit-cir -mmlir -mlir-print-ir-before=cir-cxxabi-lowering %s -o %t-arm.cir 2> %t-arm-before.cir
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// RUN: FileCheck --check-prefix=CIR-BEFORE --input-file=%t-before.cir %s
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// RUN: FileCheck --check-prefixes=CIR-AFTER,CIR-AFTER-ARM --input-file=%t-arm.cir %s
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// RUN: %clang_cc1 -triple aarch64-unknown-linux-gnu -std=c++17 -fclangir -emit-llvm %s -o %t-arm-cir.ll
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// RUN: FileCheck --input-file=%t-arm-cir.ll --check-prefixes=LLVM,LLVM-ARM %s
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// RUN: %clang_cc1 -triple aarch64-unknown-linux-gnu -std=c++17 -emit-llvm %s -o %t-arm.ll
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// RUN: FileCheck --input-file=%t-arm.ll --check-prefixes=OGCG,OGCG-ARM %s
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struct Foo {
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void m1(int);
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virtual void m2(int);
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virtual void m3(int);
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};
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struct Bar {
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void m4();
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};
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bool memfunc_to_bool(void (Foo::*func)(int)) {
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return func;
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}
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// CIR-BEFORE: cir.func {{.*}} @_Z15memfunc_to_boolM3FooFviE
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// CIR-BEFORE: %{{.*}} = cir.cast member_ptr_to_bool %{{.*}} : !cir.method<!cir.func<(!cir.ptr<!rec_Foo>, !s32i)> in !rec_Foo> -> !cir.bool
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// CIR-AFTER: cir.func {{.*}} @_Z15memfunc_to_boolM3FooFviE
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// CIR-AFTER: %[[FUNC:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!rec_anon_struct>, !rec_anon_struct
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// CIR-AFTER: %[[NULL_VAL:.*]] = cir.const #cir.int<0> : !s64i
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// CIR-AFTER: %[[FUNC_PTR:.*]] = cir.extract_member %[[FUNC]][0] : !rec_anon_struct -> !s64i
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// CIR-AFTER: %[[BOOL_VAL:.*]] = cir.cmp ne %[[FUNC_PTR]], %[[NULL_VAL]] : !s64i
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// CIR-AFTER-ARM: %[[ONE:.*]] = cir.const #cir.int<1> : !s64i
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// CIR-AFTER-ARM: %[[ADJ:.*]] = cir.extract_member %[[FUNC]][1] : !rec_anon_struct -> !s64i
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// CIR-AFTER-ARM: %[[AND:.*]] = cir.and %[[ADJ]], %[[ONE]] : !s64i
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// CIR-AFTER-ARM: %[[NOT_VIRTUAL:.*]] = cir.cmp ne %[[AND]], %[[NULL_VAL]] : !s64i
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// CIR-AFTER-ARM: %[[TMP:.*]] = cir.or %[[BOOL_VAL]], %[[NOT_VIRTUAL]] : !cir.bool
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// CIR-AFTER-X86-NOT: cir.extract_member
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// CIR-AFTER-X86-NOT: cir.and
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// CIR-AFTER-X86-NOT: cir.cmp
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// CIR-AFTER-X86-NOT: cir.or
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// LLVM: define {{.*}} i1 @_Z15memfunc_to_boolM3FooFviE
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// LLVM: %[[FUNC:.*]] = load { i64, i64 }, ptr %{{.*}}
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// LLVM: %[[FUNC_PTR:.*]] = extractvalue { i64, i64 } %[[FUNC]], 0
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// LLVM: %[[BOOL_VAL:.*]] = icmp ne i64 %[[FUNC_PTR]], 0
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// LLVM-ARM: %[[ADJ:.*]] = extractvalue { i64, i64 } %[[FUNC]], 1
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// LLVM-ARM: %[[AND:.*]] = and i64 %[[ADJ]], 1
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// LLVM-ARM: %[[NOT_VIRTUAL:.*]] = icmp ne i64 %[[AND]], 0
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// LLVM-ARM: %[[TMP:.*]] = or i1 %[[BOOL_VAL]], %[[NOT_VIRTUAL]]
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// LLVM-X86-NOT: extractvalue
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// LLVM-X86-NOT: and
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// LLVM-X86-NOT: icmp
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// LLVM-X86-NOT: or i1
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// Note: OGCG uses an extra temporary for the function argument because it
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// composes it from coerced arguments. We'll do that in CIR too after
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// calling convention lowering is implemented.
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// OGCG: define {{.*}} i1 @_Z15memfunc_to_boolM3FooFviE
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// OGCG: %[[FUNC_TMP:.*]] = load { i64, i64 }, ptr %{{.*}}
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// OGCG: store { i64, i64 } %[[FUNC_TMP]], ptr %[[FUNC_ADDR:.*]]
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// OGCG: %[[FUNC:.*]] = load { i64, i64 }, ptr %[[FUNC_ADDR]]
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// OGCG: %[[FUNC_PTR:.*]] = extractvalue { i64, i64 } %[[FUNC]], 0
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// OGCG: %[[BOOL_VAL:.*]] = icmp ne i64 %[[FUNC_PTR]], 0
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// OGCG-ARM: %[[ADJ:.*]] = extractvalue { i64, i64 } %[[FUNC]], 1
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// OGCG-ARM: %[[AND:.*]] = and i64 %[[ADJ]], 1
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// OGCG-ARM: %[[NOT_VIRTUAL:.*]] = icmp ne i64 %[[AND]], 0
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// OGCG-ARM: %[[TMP:.*]] = or i1 %[[BOOL_VAL]], %[[NOT_VIRTUAL]]
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// OGCG-X86-NOT: extractvalue
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// OGCG-X86-NOT: and
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// OGCG-X86-NOT: icmp
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// OGCG-X86-NOT: or i1
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auto memfunc_reinterpret(void (Foo::*func)(int)) -> void (Bar::*)() {
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return reinterpret_cast<void (Bar::*)()>(func);
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}
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// CIR-BEFORE: cir.func {{.*}} @_Z19memfunc_reinterpretM3FooFviE
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// CIR-BEFORE: %{{.*}} = cir.cast bitcast %{{.*}} : !cir.method<!cir.func<(!cir.ptr<!rec_Foo>, !s32i)> in !rec_Foo> -> !cir.method<!cir.func<(!cir.ptr<!rec_Bar>)> in !rec_Bar>
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// CIR-AFTER: cir.func {{.*}} @_Z19memfunc_reinterpretM3FooFviE
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// CIR-AFTER: %[[FUNC:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!rec_anon_struct>, !rec_anon_struct
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// CIR-AFTER: cir.store %[[FUNC]], %[[RET_ADDR:.*]] : !rec_anon_struct, !cir.ptr<!rec_anon_struct>
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// CIR-AFTER: %[[RET:.*]] = cir.load{{.*}} %[[RET_ADDR]] : !cir.ptr<!rec_anon_struct>, !rec_anon_struct
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// CIR-AFTER: cir.return %[[RET]] : !rec_anon_struct
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// LLVM: define {{.*}} { i64, i64 } @_Z19memfunc_reinterpretM3FooFviE
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// LLVM: %[[FUNC:.*]] = load { i64, i64 }, ptr %{{.*}}
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// LLVM: store { i64, i64 } %[[FUNC]], ptr %[[RET_ADDR:.*]]
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// LLVM: %[[RET:.*]] = load { i64, i64 }, ptr %[[RET_ADDR]]
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// LLVM: ret { i64, i64 } %[[RET]]
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// OGCG-X86: define {{.*}} { i64, i64 } @_Z19memfunc_reinterpretM3FooFviE
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// OGCG-ARM: define {{.*}} [2 x i64] @_Z19memfunc_reinterpretM3FooFviE
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// OGCG: %[[FUNC:.*]] = load { i64, i64 }, ptr %{{.*}}
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// OGCG: store { i64, i64 } %[[FUNC]], ptr %[[FUNC_ADDR:[^,]+]]
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// OGCG-X86: %[[RET:.*]] = load { i64, i64 }, ptr %[[FUNC_ADDR]]
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// OGCG-ARM: %[[TMP:.*]] = load { i64, i64 }, ptr %[[FUNC_ADDR]]
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// OGCG-ARM: store { i64, i64 } %[[TMP]], ptr %[[RET_ADDR:[^,]+]]
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// OGCG-ARM: %[[RET:.*]] = load [2 x i64], ptr %[[RET_ADDR]]
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// OGCG: ret {{.*}} %[[RET]]
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struct Base1 {
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int x;
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virtual void m1(int);
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};
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struct Base2 {
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int y;
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virtual void m2(int);
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};
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struct Derived : Base1, Base2 {
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virtual void m3(int);
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};
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using Base1MemFunc = void (Base1::*)(int);
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using Base2MemFunc = void (Base2::*)(int);
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using DerivedMemFunc = void (Derived::*)(int);
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DerivedMemFunc base_to_derived_zero_offset(Base1MemFunc ptr) {
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return static_cast<DerivedMemFunc>(ptr);
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}
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// CIR-BEFORE: cir.func {{.*}} @_Z27base_to_derived_zero_offsetM5Base1FviE
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// CIR-BEFORE: %[[PTR:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!cir.method<!cir.func<(!cir.ptr<!rec_Base1>, !s32i)> in !rec_Base1>>, !cir.method<!cir.func<(!cir.ptr<!rec_Base1>, !s32i)> in !rec_Base1>
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// CIR-BEFORE: %{{.*}} = cir.derived_method %[[PTR]][0] : !cir.method<!cir.func<(!cir.ptr<!rec_Base1>, !s32i)> in !rec_Base1> -> !cir.method<!cir.func<(!cir.ptr<!rec_Derived>, !s32i)> in !rec_Derived>
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// CIR-AFTER: cir.func {{.*}} @_Z27base_to_derived_zero_offsetM5Base1FviE
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// CIR-AFTER: %[[PTR:.*]] = cir.alloca !rec_anon_struct, !cir.ptr<!rec_anon_struct>, ["ptr", init]
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// CIR-AFTER: %[[RET:.*]] = cir.alloca !rec_anon_struct, !cir.ptr<!rec_anon_struct>, ["__retval"]
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// CIR-AFTER: cir.store %{{.*}}, %[[PTR]] : !rec_anon_struct, !cir.ptr<!rec_anon_struct>
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// CIR-AFTER: %[[TMP:.*]] = cir.load{{.*}} %[[PTR]] : !cir.ptr<!rec_anon_struct>, !rec_anon_struct
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// CIR-AFTER: cir.store %[[TMP]], %[[RET]] : !rec_anon_struct, !cir.ptr<!rec_anon_struct>
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// CIR-AFTER: %[[RET_VAL:.*]] = cir.load %[[RET]] : !cir.ptr<!rec_anon_struct>, !rec_anon_struct
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// CIR-AFTER: cir.return %[[RET_VAL]] : !rec_anon_struct
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// LLVM: define {{.*}} { i64, i64 } @_Z27base_to_derived_zero_offsetM5Base1FviE
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// LLVM: %[[ARG_ADDR:.*]] = alloca { i64, i64 }
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// LLVM: %[[RET_ADDR:.*]] = alloca { i64, i64 }
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// LLVM: store { i64, i64 } %{{.*}}, ptr %[[ARG_ADDR]]
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// LLVM: %[[TMP:.*]] = load { i64, i64 }, ptr %[[ARG_ADDR]]
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// LLVM: store { i64, i64 } %[[TMP]], ptr %[[RET_ADDR]]
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// LLVM: %[[RET:.*]] = load { i64, i64 }, ptr %[[RET_ADDR]]
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// LLVM: ret { i64, i64 } %[[RET]]
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// OGCG-X86: define {{.*}} { i64, i64 } @_Z27base_to_derived_zero_offsetM5Base1FviE
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// OGCG-ARM: define {{.*}} [2 x i64] @_Z27base_to_derived_zero_offsetM5Base1FviE
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// OGCG: %[[ARG_ADDR:.*]] = alloca { i64, i64 }
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// OGCG: store { i64, i64 } %{{.*}}, ptr %[[ARG_ADDR]]
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// OGCG-X86: %[[RET:.*]] = load { i64, i64 }, ptr %[[ARG_ADDR]]
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// OGCG-ARM: %[[RET:.*]] = load [2 x i64], ptr %[[ARG_ADDR]]
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// OGCG: ret {{.*}} %[[RET]]
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DerivedMemFunc base_to_derived(Base2MemFunc ptr) {
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return static_cast<DerivedMemFunc>(ptr);
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}
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// CIR-BEFORE: cir.func {{.*}} @_Z15base_to_derivedM5Base2FviE
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// CIR-BEFORE: %[[PTR:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!cir.method<!cir.func<(!cir.ptr<!rec_Base2>, !s32i)> in !rec_Base2>>, !cir.method<!cir.func<(!cir.ptr<!rec_Base2>, !s32i)> in !rec_Base2>
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// CIR-BEFORE: %{{.*}} = cir.derived_method %[[PTR]][16] : !cir.method<!cir.func<(!cir.ptr<!rec_Base2>, !s32i)> in !rec_Base2> -> !cir.method<!cir.func<(!cir.ptr<!rec_Derived>, !s32i)> in !rec_Derived>
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// CIR-AFTER: cir.func {{.*}} @_Z15base_to_derivedM5Base2FviE
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// CIR-AFTER: %[[PTR:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!rec_anon_struct>, !rec_anon_struct
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// CIR-AFTER: %[[OFFSET:.*]] = cir.extract_member %[[PTR]][1] : !rec_anon_struct -> !s64i
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// CIR-AFTER-X86: %[[OFFSET_ADJ:.*]] = cir.const #cir.int<16> : !s64i
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// CIR-AFTER-ARM: %[[OFFSET_ADJ:.*]] = cir.const #cir.int<32> : !s64i
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// CIR-AFTER: %[[BINOP_KIND:.*]] = cir.add nsw %[[OFFSET]], %[[OFFSET_ADJ]] : !s64i
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// CIR-AFTER: %{{.*}} = cir.insert_member %[[PTR]][1], %[[BINOP_KIND]] : !rec_anon_struct, !s64i
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// LLVM: define {{.*}} { i64, i64 } @_Z15base_to_derivedM5Base2FviE
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// LLVM: %[[ARG:.*]] = load { i64, i64 }, ptr %{{.*}}
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// LLVM: %[[ADJ:.*]] = extractvalue { i64, i64 } %[[ARG]], 1
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// LLVM-X86: %[[ADJ_ADJ:.*]] = add nsw i64 %[[ADJ]], 16
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// LLVM-ARM: %[[ADJ_ADJ:.*]] = add nsw i64 %[[ADJ]], 32
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// LLVM: %{{.*}} = insertvalue { i64, i64 } %[[ARG]], i64 %[[ADJ_ADJ]], 1
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// OGCG-X86: define {{.*}} { i64, i64 } @_Z15base_to_derivedM5Base2FviE
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// OGCG-ARM: define {{.*}} [2 x i64] @_Z15base_to_derivedM5Base2FviE
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// OGCG: %[[ARG:.*]] = load { i64, i64 }, ptr %{{.*}}
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// OGCG: store { i64, i64 } %[[ARG]], ptr %[[ARG_ADDR:.*]]
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// OGCG: %[[ARG1:.*]] = load { i64, i64 }, ptr %[[ARG_ADDR]]
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// OGCG: %[[ADJ:.*]] = extractvalue { i64, i64 } %[[ARG1]], 1
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// OGCG-X86: %[[ADJ_ADJ:.*]] = add nsw i64 %[[ADJ]], 16
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// OGCG-ARM: %[[ADJ_ADJ:.*]] = add nsw i64 %[[ADJ]], 32
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// OGCG: %{{.*}} = insertvalue { i64, i64 } %[[ARG1]], i64 %[[ADJ_ADJ]], 1
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Base1MemFunc derived_to_base_zero_offset(DerivedMemFunc ptr) {
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return static_cast<Base1MemFunc>(ptr);
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}
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// CIR-BEFORE: cir.func {{.*}} @_Z27derived_to_base_zero_offsetM7DerivedFviE
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// CIR-BEFORE: %[[PTR:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!cir.method<!cir.func<(!cir.ptr<!rec_Derived>, !s32i)> in !rec_Derived>>, !cir.method<!cir.func<(!cir.ptr<!rec_Derived>, !s32i)> in !rec_Derived>
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// CIR-BEFORE: %{{.*}} = cir.base_method %[[PTR]][0] : !cir.method<!cir.func<(!cir.ptr<!rec_Derived>, !s32i)> in !rec_Derived> -> !cir.method<!cir.func<(!cir.ptr<!rec_Base1>, !s32i)> in !rec_Base1>
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// CIR-AFTER: cir.func {{.*}} @_Z27derived_to_base_zero_offsetM7DerivedFviE
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// CIR-AFTER: %[[PTR:.*]] = cir.alloca !rec_anon_struct, !cir.ptr<!rec_anon_struct>, ["ptr", init]
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// CIR-AFTER: %[[RET:.*]] = cir.alloca !rec_anon_struct, !cir.ptr<!rec_anon_struct>, ["__retval"]
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// CIR-AFTER: cir.store %{{.*}}, %[[PTR]] : !rec_anon_struct, !cir.ptr<!rec_anon_struct>
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// CIR-AFTER: %[[TMP:.*]] = cir.load{{.*}} %[[PTR]] : !cir.ptr<!rec_anon_struct>, !rec_anon_struct
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// CIR-AFTER: cir.store %[[TMP]], %[[RET]] : !rec_anon_struct, !cir.ptr<!rec_anon_struct>
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// CIR-AFTER: %[[RET_VAL:.*]] = cir.load %[[RET]] : !cir.ptr<!rec_anon_struct>, !rec_anon_struct
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// CIR-AFTER: cir.return %[[RET_VAL]] : !rec_anon_struct
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// LLVM: define {{.*}} { i64, i64 } @_Z27derived_to_base_zero_offsetM7DerivedFviE
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// LLVM: %[[ARG_ADDR:.*]] = alloca { i64, i64 }
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// LLVM: %[[RET_ADDR:.*]] = alloca { i64, i64 }
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// LLVM: store { i64, i64 } %{{.*}}, ptr %[[ARG_ADDR]]
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// LLVM: %[[TMP:.*]] = load { i64, i64 }, ptr %[[ARG_ADDR]]
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// LLVM: store { i64, i64 } %[[TMP]], ptr %[[RET_ADDR]]
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// LLVM: %[[RET:.*]] = load { i64, i64 }, ptr %[[RET_ADDR]]
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// LLVM: ret { i64, i64 } %[[RET]]
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// OGCG-X86: define {{.*}} { i64, i64 } @_Z27derived_to_base_zero_offsetM7DerivedFviE
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// OGCG-ARM: define {{.*}} [2 x i64] @_Z27derived_to_base_zero_offsetM7DerivedFviE
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// OGCG-ARM: %[[RETVAL:.*]] = alloca { i64, i64 }
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// OGCG: %[[ARG_ADDR:.*]] = alloca { i64, i64 }
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// OGCG-ARM: %[[ARG_COERCE:.*]] = alloca { i64, i64 }
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// OGCG: store { i64, i64 } %{{.*}}, ptr %[[ARG_ADDR]]
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// OGCG-X86: %[[RET:.*]] = load { i64, i64 }, ptr %[[ARG_ADDR]]
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// OGCG-ARM: %[[TMP:.*]] = load { i64, i64 }, ptr %[[ARG_ADDR]]
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// OGCG-ARM: store { i64, i64 } %[[TMP]], ptr %[[RETVAL]]
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// OGCG-ARM: %[[RET:.*]] = load [2 x i64], ptr %[[RETVAL]]
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// OGCG: ret {{.*}} %[[RET]]
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Base2MemFunc derived_to_base(DerivedMemFunc ptr) {
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return static_cast<Base2MemFunc>(ptr);
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}
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// CIR-BEFORE: cir.func {{.*}} @_Z15derived_to_baseM7DerivedFviE
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// CIR-BEFORE: %[[PTR:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!cir.method<!cir.func<(!cir.ptr<!rec_Derived>, !s32i)> in !rec_Derived>>, !cir.method<!cir.func<(!cir.ptr<!rec_Derived>, !s32i)> in !rec_Derived>
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// CIR-BEFORE: %{{.*}} = cir.base_method %[[PTR]][16] : !cir.method<!cir.func<(!cir.ptr<!rec_Derived>, !s32i)> in !rec_Derived> -> !cir.method<!cir.func<(!cir.ptr<!rec_Base2>, !s32i)> in !rec_Base2>
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// CIR-AFTER: cir.func {{.*}} @_Z15derived_to_baseM7DerivedFviE
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// CIR-AFTER: %[[PTR:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!rec_anon_struct>, !rec_anon_struct
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// CIR-AFTER: %[[OFFSET:.*]] = cir.extract_member %[[PTR]][1] : !rec_anon_struct -> !s64i
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// CIR-AFTER-X86: %[[OFFSET_ADJ:.*]] = cir.const #cir.int<16> : !s64i
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// CIR-AFTER-ARM: %[[OFFSET_ADJ:.*]] = cir.const #cir.int<32> : !s64i
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// CIR-AFTER: %[[BINOP_KIND:.*]] = cir.sub nsw %[[OFFSET]], %[[OFFSET_ADJ]] : !s64i
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// CIR-AFTER: %{{.*}} = cir.insert_member %[[PTR]][1], %[[BINOP_KIND]] : !rec_anon_struct, !s64i
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// LLVM: define {{.*}} { i64, i64 } @_Z15derived_to_baseM7DerivedFviE
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// LLVM: %[[ARG:.*]] = load { i64, i64 }, ptr %{{.*}}
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// LLVM: %[[ADJ:.*]] = extractvalue { i64, i64 } %[[ARG]], 1
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// LLVM-X86: %[[ADJ_ADJ:.*]] = sub nsw i64 %[[ADJ]], 16
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// LLVM-ARM: %[[ADJ_ADJ:.*]] = sub nsw i64 %[[ADJ]], 32
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// LLVM: %{{.*}} = insertvalue { i64, i64 } %[[ARG]], i64 %[[ADJ_ADJ]], 1
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// OGCG-X86: define {{.*}} { i64, i64 } @_Z15derived_to_baseM7DerivedFviE
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// OGCG-ARM: define {{.*}} [2 x i64] @_Z15derived_to_baseM7DerivedFviE
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// OGCG: %[[ARG:.*]] = load { i64, i64 }, ptr %{{.*}}
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// OGCG: store { i64, i64 } %[[ARG]], ptr %[[ARG_ADDR:.*]]
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// OGCG: %[[ARG1:.*]] = load { i64, i64 }, ptr %[[ARG_ADDR]]
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// OGCG: %[[ADJ:.*]] = extractvalue { i64, i64 } %[[ARG1]], 1
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// OGCG-X86: %[[ADJ_ADJ:.*]] = sub nsw i64 %[[ADJ]], 16
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// OGCG-ARM: %[[ADJ_ADJ:.*]] = sub nsw i64 %[[ADJ]], 32
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// OGCG: %{{.*}} = insertvalue { i64, i64 } %[[ARG1]], i64 %[[ADJ_ADJ]], 1
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