derek.holloway
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72 lines
3.6 KiB
C
72 lines
3.6 KiB
C
// RUN: %clang_cc1 -x c -ffreestanding %s -O2 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -fclangir -emit-cir -o - -Wall -Werror | FileCheck %s --check-prefixes=CIR
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// RUN: %clang_cc1 -x c -ffreestanding %s -O2 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -fclangir -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=LLVM
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// RUN: %clang_cc1 -x c -ffreestanding %s -O2 -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG
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#include <immintrin.h>
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double test_mm512_reduce_add_pd(__m512d __W, double ExtraAddOp){
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// CIR-LABEL: _mm512_reduce_add_pd
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// CIR: cir.call_llvm_intrinsic "vector.reduce.fadd" %[[R:.*]], %[[V:.*]] : (!cir.double{{.*}}, !cir.vector<8 x !cir.double>{{.*}}) -> !cir.double
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// CIR-LABEL: test_mm512_reduce_add_pd
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// CIR: cir.call @_mm512_reduce_add_pd(%[[VEC:.*]]) {nobuiltin, nobuiltins = [{{.*}}]} : (!cir.vector<8 x !cir.double>{{.*}}) -> !cir.double
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// LLVM-LABEL: test_mm512_reduce_add_pd
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// LLVM: call double @llvm.vector.reduce.fadd.v8f64(double -0.000000e+00, <8 x double> %{{.*}})
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// OGCG-LABEL: test_mm512_reduce_add_pd
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// OGCG-NOT: reassoc
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// OGCG: call reassoc {{.*}}double @llvm.vector.reduce.fadd.v8f64(double -0.000000e+00, <8 x double> %{{.*}})
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// OGCG-NOT: reassoc
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return _mm512_reduce_add_pd(__W) + ExtraAddOp;
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}
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double test_mm512_reduce_mul_pd(__m512d __W, double ExtraMulOp){
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// CIR-LABEL: _mm512_reduce_mul_pd
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// CIR: cir.call_llvm_intrinsic "vector.reduce.fmul" %[[R:.*]], %[[V:.*]] : (!cir.double{{.*}}, !cir.vector<8 x !cir.double>{{.*}}) -> !cir.double
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// CIR-LABEL: test_mm512_reduce_mul_pd
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// CIR: cir.call @_mm512_reduce_mul_pd(%[[VEC:.*]]) {nobuiltin, nobuiltins = [{{.*}}]} : (!cir.vector<8 x !cir.double>{{.*}}) -> !cir.double
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// LLVM-LABEL: test_mm512_reduce_mul_pd
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// LLVM: call double @llvm.vector.reduce.fmul.v8f64(double 1.000000e+00, <8 x double> %{{.*}})
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// OGCG-LABEL: test_mm512_reduce_mul_pd
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// OGCG-NOT: reassoc
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// OGCG: call reassoc {{.*}}double @llvm.vector.reduce.fmul.v8f64(double 1.000000e+00, <8 x double> %{{.*}})
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// OGCG-NOT: reassoc
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return _mm512_reduce_mul_pd(__W) * ExtraMulOp;
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}
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float test_mm512_reduce_add_ps(__m512 __W){
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// CIR-LABEL: _mm512_reduce_add_ps
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// CIR: cir.call_llvm_intrinsic "vector.reduce.fadd" %[[R:.*]], %[[V:.*]] : (!cir.float{{.*}}, !cir.vector<16 x !cir.float>{{.*}}) -> !cir.float
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// CIR-LABEL: test_mm512_reduce_add_ps
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// CIR: cir.call @_mm512_reduce_add_ps(%[[VEC:.*]]) {nobuiltin, nobuiltins = [{{.*}}]} : (!cir.vector<16 x !cir.float>{{.*}}) -> !cir.float
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// LLVM-LABEL: test_mm512_reduce_add_ps
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// LLVM: call float @llvm.vector.reduce.fadd.v16f32(float -0.000000e+00, <16 x float> %{{.*}})
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// OGCG-LABEL: test_mm512_reduce_add_ps
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// OGCG: call reassoc {{.*}}float @llvm.vector.reduce.fadd.v16f32(float -0.000000e+00, <16 x float> %{{.*}})
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return _mm512_reduce_add_ps(__W);
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}
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float test_mm512_reduce_mul_ps(__m512 __W){
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// CIR-LABEL: _mm512_reduce_mul_ps
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// CIR: cir.call_llvm_intrinsic "vector.reduce.fmul" %[[R:.*]], %[[V:.*]] : (!cir.float{{.*}}, !cir.vector<16 x !cir.float>{{.*}}) -> !cir.float
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// CIR-LABEL: test_mm512_reduce_mul_ps
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// CIR: cir.call @_mm512_reduce_mul_ps(%[[VEC:.*]]) {nobuiltin, nobuiltins = [{{.*}}]} : (!cir.vector<16 x !cir.float>{{.*}}) -> !cir.float
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// LLVM-LABEL: test_mm512_reduce_mul_ps
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// LLVM: call float @llvm.vector.reduce.fmul.v16f32(float 1.000000e+00, <16 x float> %{{.*}})
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// OGCG-LABEL: test_mm512_reduce_mul_ps
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// OGCG: call reassoc {{.*}}float @llvm.vector.reduce.fmul.v16f32(float 1.000000e+00, <16 x float> %{{.*}})
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return _mm512_reduce_mul_ps(__W);
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}
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