derek.holloway
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116 lines
4.9 KiB
C
116 lines
4.9 KiB
C
// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse -fclangir -emit-cir -o %t.cir -Wall -Werror
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// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
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// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse -fclangir -emit-llvm -o %t.ll -Wall -Werror
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// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
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// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse -fno-signed-char -fclangir -emit-cir -o %t.cir -Wall -Werror
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// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
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// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse -fclangir -emit-llvm -o %t.ll -Wall -Werror
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// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
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// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG
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// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG
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// This test mimics clang/test/CodeGen/X86/sse-builtins.c, which eventually
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// CIR shall be able to support fully.
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#include <immintrin.h>
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void test_mm_setcsr(unsigned int A) {
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// CIR-LABEL: test_mm_setcsr
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// CIR: cir.store {{.*}}, {{.*}} : !u32i
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// CIR: cir.call_llvm_intrinsic "x86.sse.ldmxcsr" {{.*}} : (!cir.ptr<!u32i>) -> !void
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// LLVM-LABEL: test_mm_setcsr
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// LLVM: store i32
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// LLVM: call void @llvm.x86.sse.ldmxcsr(ptr {{.*}})
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// OGCG-LABEL: test_mm_setcsr
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// OGCG: store i32
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// OGCG: call void @llvm.x86.sse.ldmxcsr(ptr {{.*}})
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_mm_setcsr(A);
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}
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unsigned int test_mm_getcsr(void) {
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// CIR-LABEL: test_mm_getcsr
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// CIR: cir.call_llvm_intrinsic "x86.sse.stmxcsr" %{{.*}} : (!cir.ptr<!u32i>) -> !void
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// CIR: cir.load {{.*}} : !cir.ptr<!u32i>, !u32i
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// LLVM-LABEL: test_mm_getcsr
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// LLVM: call void @llvm.x86.sse.stmxcsr(ptr %{{.*}})
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// LLVM: load i32
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// OGCG-LABEL: test_mm_getcsr
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// OGCG: call void @llvm.x86.sse.stmxcsr(ptr %{{.*}})
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// OGCG: load i32
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return _mm_getcsr();
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}
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void test_mm_sfence(void) {
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// CIR-LABEL: test_mm_sfence
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// LLVM-LABEL: test_mm_sfence
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// OGCG-LABEL: test_mm_sfence
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_mm_sfence();
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// CIR: {{%.*}} = cir.call_llvm_intrinsic "x86.sse.sfence" : () -> !void
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// LLVM: call void @llvm.x86.sse.sfence()
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// OGCG: call void @llvm.x86.sse.sfence()
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}
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void test_mm_prefetch(char const* p) {
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// CIR-LABEL: test_mm_prefetch
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// LLVM-LABEL: test_mm_prefetch
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// OGCG-LABEL: test_mm_prefetch
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_mm_prefetch(p, 0);
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// CIR: cir.prefetch read locality(0) %{{.*}} : !cir.ptr<!void>
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// LLVM: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 0, i32 1)
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// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 0, i32 1)
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}
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void test_mm_prefetch_local(char const* p) {
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// CIR-LABEL: test_mm_prefetch_local
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// LLVM-LABEL: test_mm_prefetch_local
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// OGCG-LABEL: test_mm_prefetch_local
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_mm_prefetch(p, 3);
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// CIR: cir.prefetch read locality(3) %{{.*}} : !cir.ptr<!void>
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// LLVM: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 3, i32 1)
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// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0, i32 3, i32 1)
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}
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void test_mm_prefetch_write(char const* p) {
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// CIR-LABEL: test_mm_prefetch_write
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// LLVM-LABEL: test_mm_prefetch_write
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// OGCG-LABEL: test_mm_prefetch_write
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_mm_prefetch(p, 7);
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// CIR: cir.prefetch write locality(3) %{{.*}} : !cir.ptr<!void>
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// LLVM: call void @llvm.prefetch.p0(ptr {{.*}}, i32 1, i32 3, i32 1)
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// OGCG: call void @llvm.prefetch.p0(ptr {{.*}}, i32 1, i32 3, i32 1)
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}
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__m128 test_mm_undefined_ps(void) {
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// CIR-LABEL: _mm_undefined_ps
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// CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double>
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// CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> !cir.vector<4 x !cir.float>
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// CIR: cir.return %{{.*}} : !cir.vector<4 x !cir.float>
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// LLVM-LABEL: test_mm_undefined_ps
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// LLVM: store <4 x float> zeroinitializer, ptr %[[A:.*]], align 16
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// LLVM: %{{.*}} = load <4 x float>, ptr %[[A]], align 16
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// LLVM: ret <4 x float> %{{.*}}
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// OGCG-LABEL: test_mm_undefined_ps
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// OGCG: ret <4 x float> zeroinitializer
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return _mm_undefined_ps();
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}
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__m128 test_mm_shuffle_ps(__m128 A, __m128 B) {
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// CIR-LABEL: _mm_shuffle_ps
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// CIR: %{{.*}} = cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<4 x !cir.float>) [#cir.int<0> : !s32i, #cir.int<0> : !s32i, #cir.int<4> : !s32i, #cir.int<4> : !s32i] : !cir.vector<4 x !cir.float>
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// LLVM-LABEL: test_mm_shuffle_ps
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// LLVM: shufflevector <4 x float> {{.*}}, <4 x float> {{.*}}, <4 x i32> <i32 0, i32 0, i32 4, i32 4>
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// OGCG-LABEL: test_mm_shuffle_ps
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// OGCG: shufflevector <4 x float> {{.*}}, <4 x float> {{.*}}, <4 x i32> <i32 0, i32 0, i32 4, i32 4>
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return _mm_shuffle_ps(A, B, 0);
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}
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