derek.holloway
7502bf64a4
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185 lines
8.4 KiB
C
185 lines
8.4 KiB
C
// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse2 -fclangir -emit-cir -o %t.cir -Wall -Werror
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// RUN: FileCheck --check-prefixes=CIR --input-file=%t.cir %s
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// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse2 -fno-signed-char -fclangir -emit-cir -o %t.cir -Wall -Werror
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// RUN: FileCheck --check-prefixes=CIR --input-file=%t.cir %s
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// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse2 -fclangir -emit-llvm -o %t.ll -Wall -Werror
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// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
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// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +sse2 -fno-signed-char -fclangir -emit-llvm -o %t.ll -Wall -Werror
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// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s
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// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse2 -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG
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// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse2 -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG
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// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse2 -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG
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// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse2 -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG
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// This test mimics clang/test/CodeGen/X86/sse2-builtins.c, which eventually
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// CIR shall be able to support fully.
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#include <immintrin.h>
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__m128d test_mm_undefined_pd(void) {
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// CIR-LABEL: _mm_undefined_pd
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// CIR: %{{.*}} = cir.const #cir.zero : !cir.vector<2 x !cir.double>
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// CIR: cir.return %{{.*}} : !cir.vector<2 x !cir.double>
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// CIR-LABEL: cir.func {{.*}}test_mm_undefined_pd
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// CIR: call @_mm_undefined_pd
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// LLVM-LABEL: test_mm_undefined_pd
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// LLVM: store <2 x double> zeroinitializer, ptr %[[A:.*]], align 16
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// LLVM: %{{.*}} = load <2 x double>, ptr %[[A]], align 16
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// LLVM: ret <2 x double> %{{.*}}
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// OGCG-LABEL: test_mm_undefined_pd
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// OGCG: ret <2 x double> zeroinitializer
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return _mm_undefined_pd();
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}
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__m128i test_mm_undefined_si128(void) {
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// CIR-LABEL: _mm_undefined_si128
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// CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double>
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// CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> ->
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// CIR: cir.return %{{.*}} :
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// CIR-LABEL: cir.func {{.*}}test_mm_undefined_si128
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// CIR: call @_mm_undefined_si128
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// LLVM-LABEL: test_mm_undefined_si128
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// LLVM: store <2 x i64> zeroinitializer, ptr %[[A:.*]], align 16
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// LLVM: %{{.*}} = load <2 x i64>, ptr %[[A]], align 16
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// LLVM: ret <2 x i64> %{{.*}}
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// OGCG-LABEL: test_mm_undefined_si128
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// OGCG: ret <2 x i64> zeroinitializer
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return _mm_undefined_si128();
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}
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// Lowering to pextrw requires optimization.
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int test_mm_extract_epi16(__m128i A) {
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// CIR-LABEL: test_mm_extract_epi16
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// CIR %{{.*}} = cir.vec.extract %{{.*}}[%{{.*}} : {{!u32i|!u64i}}] : !cir.vector<!s16i x 8>
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// CIR %{{.*}} = cir.cast integral %{{.*}} : !u16i -> !s32i
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// LLVM-LABEL: test_mm_extract_epi16
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// LLVM: extractelement <8 x i16> %{{.*}}, {{i32|i64}} 1
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// LLVM: zext i16 %{{.*}} to i32
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// OGCG-LABEL: test_mm_extract_epi16
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// OGCG: extractelement <8 x i16> %{{.*}}, {{i32|i64}} 1
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// OGCG: zext i16 %{{.*}} to i32
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return _mm_extract_epi16(A, 1);
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}
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void test_mm_clflush(void* A) {
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// CIR-LABEL: test_mm_clflush
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// LLVM-LABEL: test_mm_clflush
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// OGCG-LABEL: test_mm_clflush
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_mm_clflush(A);
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// CIR: {{%.*}} = cir.call_llvm_intrinsic "x86.sse2.clflush" {{%.*}} : (!cir.ptr<!void>) -> !void
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// LLVM: call void @llvm.x86.sse2.clflush(ptr {{%.*}})
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// OGCG: call void @llvm.x86.sse2.clflush(ptr {{%.*}})
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}
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void test_mm_lfence(void) {
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// CIR-LABEL: test_mm_lfence
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// LLVM-LABEL: test_mm_lfence
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// OGCG-LABEL: test_mm_lfence
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_mm_lfence();
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// CIR: {{%.*}} = cir.call_llvm_intrinsic "x86.sse2.lfence" : () -> !void
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// LLVM: call void @llvm.x86.sse2.lfence()
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// OGCG: call void @llvm.x86.sse2.lfence()
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}
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void test_mm_mfence(void) {
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// CIR-LABEL: test_mm_mfence
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// LLVM-LABEL: test_mm_mfence
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// OGCG-LABEL: test_mm_mfence
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_mm_mfence();
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// CIR: {{%.*}} = cir.call_llvm_intrinsic "x86.sse2.mfence" : () -> !void
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// LLVM: call void @llvm.x86.sse2.mfence()
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// OGCG: call void @llvm.x86.sse2.mfence()
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}
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void test_mm_pause(void) {
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// CIR-LABEL: test_mm_pause
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// LLVM-LABEL: test_mm_pause
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// OGCG-LABEL: test_mm_pause
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_mm_pause();
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// CIR: {{%.*}} = cir.call_llvm_intrinsic "x86.sse2.pause" : () -> !void
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// LLVM: call void @llvm.x86.sse2.pause()
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// OGCG: call void @llvm.x86.sse2.pause()
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}
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__m128i test_mm_shufflelo_epi16(__m128i A) {
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// CIR-LABEL: _mm_shufflelo_epi16
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// CIR: %{{.*}} = cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !s16i>) [#cir.int<0> : !s32i, #cir.int<0> : !s32i, #cir.int<0> : !s32i, #cir.int<0> : !s32i, #cir.int<4> : !s32i, #cir.int<5> : !s32i, #cir.int<6> : !s32i, #cir.int<7> : !s32i] : !cir.vector<8 x !s16i>
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// LLVM-LABEL: test_mm_shufflelo_epi16
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// LLVM: shufflevector <8 x i16> %{{.*}}, <8 x i16> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7>
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// OGCG-LABEL: test_mm_shufflelo_epi16
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// OGCG: shufflevector <8 x i16> %{{.*}}, <8 x i16> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 5, i32 6, i32 7>
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return _mm_shufflelo_epi16(A, 0);
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}
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__m128i test_mm_shufflehi_epi16(__m128i A) {
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// CIR-LABEL: _mm_shufflehi_epi16
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// CIR: %{{.*}} = cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<8 x !s16i>) [#cir.int<0> : !s32i, #cir.int<1> : !s32i, #cir.int<2> : !s32i, #cir.int<3> : !s32i, #cir.int<4> : !s32i, #cir.int<4> : !s32i, #cir.int<4> : !s32i, #cir.int<4> : !s32i] : !cir.vector<8 x !s16i>
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// LLVM-LABEL: test_mm_shufflehi_epi16
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// LLVM: shufflevector <8 x i16> %{{.*}}, <8 x i16> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>
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// OGCG-LABEL: test_mm_shufflehi_epi16
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// OGCG: shufflevector <8 x i16> %{{.*}}, <8 x i16> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>
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return _mm_shufflehi_epi16(A, 0);
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}
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__m128d test_mm_shuffle_pd(__m128d A, __m128d B) {
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// CIR-LABEL: test_mm_shuffle_pd
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// CIR: %{{.*}} = cir.vec.shuffle(%{{.*}}, %{{.*}} : !cir.vector<2 x !cir.double>) [#cir.int<1> : !s32i, #cir.int<2> : !s32i] : !cir.vector<2 x !cir.double>
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// LLVM-LABEL: test_mm_shuffle_pd
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// LLVM: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> <i32 1, i32 2>
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// OGCG-LABEL: test_mm_shuffle_pd
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// OGCG: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> <i32 1, i32 2>
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return _mm_shuffle_pd(A, B, 1);
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}
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__m128i test_mm_shuffle_epi32(__m128i A) {
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// CIR-LABEL: test_mm_shuffle_epi32
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// CIR: %{{.*}} = cir.vec.shuffle(%{{.*}}, %{{.*}}: !cir.vector<4 x !s32i>) [#cir.int<2> : !s32i, #cir.int<3> : !s32i, #cir.int<0> : !s32i, #cir.int<1> : !s32i] : !cir.vector<4 x !s32i>
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// LLVM-LABEL: test_mm_shuffle_epi32
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// LLVM: shufflevector <4 x i32> %{{.*}}, <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
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// OGCG-LABEL: test_mm_shuffle_epi32
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// OGCG: shufflevector <4 x i32> %{{.*}}, <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
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return _mm_shuffle_epi32(A, 0x4E);
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}
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__m128i test_mm_mul_epu32(__m128i A, __m128i B) {
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// CIR-LABEL: _mm_mul_epu32
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// CIR: [[BC_A:%.*]] = cir.cast bitcast %{{.*}} : {{.*}} -> !cir.vector<2 x !s64i>
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// CIR: [[BC_B:%.*]] = cir.cast bitcast %{{.*}} : {{.*}} -> !cir.vector<2 x !s64i>
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// CIR: [[MASK_SCALAR:%.*]] = cir.const #cir.int<4294967295> : !s64i
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// CIR: [[MASK_VEC:%.*]] = cir.vec.splat [[MASK_SCALAR]] : !s64i, !cir.vector<2 x !s64i>
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// CIR: [[AND_A:%.*]] = cir.and [[BC_A]], [[MASK_VEC]]
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// CIR: [[AND_B:%.*]] = cir.and [[BC_B]], [[MASK_VEC]]
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// CIR: [[MUL:%.*]] = cir.mul [[AND_A]], [[AND_B]]
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// LLVM-LABEL: _mm_mul_epu32
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// LLVM: and <2 x i64> %{{.*}}, splat (i64 4294967295)
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// LLVM: and <2 x i64> %{{.*}}, splat (i64 4294967295)
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// LLVM: mul <2 x i64> %{{.*}}, %{{.*}}
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// OGCG-LABEL: _mm_mul_epu32
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// OGCG: and <2 x i64> %{{.*}}, splat (i64 4294967295)
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// OGCG: and <2 x i64> %{{.*}}, splat (i64 4294967295)
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// OGCG: mul <2 x i64> %{{.*}}, %{{.*}}
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return _mm_mul_epu32(A, B);
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}
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