derek.holloway
7502bf64a4
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133 lines
8.2 KiB
C
133 lines
8.2 KiB
C
// RUN: %clang_cc1 -fopenacc -Wno-openacc-self-if-potential-conflict -emit-cir -fclangir %s -o - | FileCheck %s
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void acc_cache() {
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// CHECK: cir.func{{.*}} @acc_cache()
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int iArr[10];
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// CHECK-NEXT: %[[IARR:.*]] = cir.alloca !cir.array<!s32i x 10>, !cir.ptr<!cir.array<!s32i x 10>>, ["iArr"]
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float fArr[10];
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// CHECK-NEXT: %[[FARR:.*]] = cir.alloca !cir.array<!cir.float x 10>, !cir.ptr<!cir.array<!cir.float x 10>>, ["fArr"]
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#pragma acc cache(iArr[1], fArr[1:5])
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// This does nothing, as it is not in a loop.
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#pragma acc parallel
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{
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#pragma acc cache(iArr[1], fArr[1:5])
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// This does nothing, as it is not in a loop.
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}
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// CHECK-NEXT: acc.parallel {
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: } loc
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#pragma acc loop
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for(int i = 0; i < 5; ++i) {
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for(int j = 0; j < 5; ++j) {
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#pragma acc cache(iArr[1], fArr[1:5])
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}
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}
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// CHECK-NEXT: %[[ONE:.*]] = cir.const #cir.int<1>
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// CHECK-NEXT: %[[ONE_CAST:.*]] = builtin.unrealized_conversion_cast %[[ONE]] : !s32i to si32
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// CHECK-NEXT: %[[ONE_CONST:.*]] = arith.constant 1 : i64
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// CHECK-NEXT: %[[ZERO_CONST:.*]] = arith.constant 0 : i64
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// CHECK-NEXT: %[[ONE_CONST2:.*]] = arith.constant 1 : i64
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// CHECK-NEXT: %[[BOUNDS:.*]] = acc.bounds lowerbound(%[[ONE_CAST]] : si32) extent(%[[ONE_CONST]] : i64) stride(%[[ONE_CONST2]] : i64) startIdx(%[[ZERO_CONST]] : i64)
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// CHECK-NEXT: %[[CACHE1:.*]] = acc.cache varPtr(%[[IARR]] : !cir.ptr<!cir.array<!s32i x 10>>) bounds(%[[BOUNDS]]) -> !cir.ptr<!cir.array<!s32i x 10>> {name = "iArr[1]", structured = false}
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//
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// CHECK-NEXT: %[[ONE:.*]] = cir.const #cir.int<1>
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// CHECK-NEXT: %[[ONE_CAST:.*]] = builtin.unrealized_conversion_cast %[[ONE]] : !s32i to si32
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// CHECK-NEXT: %[[FIVE:.*]] = cir.const #cir.int<5>
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// CHECK-NEXT: %[[FIVE_CAST:.*]] = builtin.unrealized_conversion_cast %[[FIVE]] : !s32i to si32
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// CHECK-NEXT: %[[ZERO_CONST:.*]] = arith.constant 0 : i64
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// CHECK-NEXT: %[[ONE_CONST:.*]] = arith.constant 1 : i64
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// CHECK-NEXT: %[[BOUNDS:.*]] = acc.bounds lowerbound(%[[ONE_CAST]] : si32) extent(%[[FIVE_CAST]] : si32) stride(%[[ONE_CONST]] : i64) startIdx(%[[ZERO_CONST]] : i64)
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// CHECK-NEXT: %[[CACHE2:.*]] = acc.cache varPtr(%[[FARR]] : !cir.ptr<!cir.array<!cir.float x 10>>) bounds(%[[BOUNDS]]) -> !cir.ptr<!cir.array<!cir.float x 10>> {name = "fArr[1:5]", structured = false}
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//
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// CHECK-NEXT: acc.loop cache(%[[CACHE1]], %[[CACHE2]] : !cir.ptr<!cir.array<!s32i x 10>>, !cir.ptr<!cir.array<!cir.float x 10>>) {
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// CHECK: acc.yield
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// CHECK-NEXT: } attributes {independent = [#acc.device_type<none>]}
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#pragma acc loop
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for(int i = 0; i < 5; ++i) {
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#pragma acc cache(iArr[1], fArr[1:5])
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}
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// CHECK-NEXT: %[[ONE:.*]] = cir.const #cir.int<1>
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// CHECK-NEXT: %[[ONE_CAST:.*]] = builtin.unrealized_conversion_cast %[[ONE]] : !s32i to si32
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// CHECK-NEXT: %[[ONE_CONST:.*]] = arith.constant 1 : i64
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// CHECK-NEXT: %[[ZERO_CONST:.*]] = arith.constant 0 : i64
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// CHECK-NEXT: %[[ONE_CONST2:.*]] = arith.constant 1 : i64
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// CHECK-NEXT: %[[BOUNDS:.*]] = acc.bounds lowerbound(%[[ONE_CAST]] : si32) extent(%[[ONE_CONST]] : i64) stride(%[[ONE_CONST2]] : i64) startIdx(%[[ZERO_CONST]] : i64)
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// CHECK-NEXT: %[[CACHE1:.*]] = acc.cache varPtr(%[[IARR]] : !cir.ptr<!cir.array<!s32i x 10>>) bounds(%[[BOUNDS]]) -> !cir.ptr<!cir.array<!s32i x 10>> {name = "iArr[1]", structured = false}
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//
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// CHECK-NEXT: %[[ONE:.*]] = cir.const #cir.int<1>
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// CHECK-NEXT: %[[ONE_CAST:.*]] = builtin.unrealized_conversion_cast %[[ONE]] : !s32i to si32
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// CHECK-NEXT: %[[FIVE:.*]] = cir.const #cir.int<5>
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// CHECK-NEXT: %[[FIVE_CAST:.*]] = builtin.unrealized_conversion_cast %[[FIVE]] : !s32i to si32
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// CHECK-NEXT: %[[ZERO_CONST:.*]] = arith.constant 0 : i64
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// CHECK-NEXT: %[[ONE_CONST:.*]] = arith.constant 1 : i64
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// CHECK-NEXT: %[[BOUNDS:.*]] = acc.bounds lowerbound(%[[ONE_CAST]] : si32) extent(%[[FIVE_CAST]] : si32) stride(%[[ONE_CONST]] : i64) startIdx(%[[ZERO_CONST]] : i64)
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// CHECK-NEXT: %[[CACHE2:.*]] = acc.cache varPtr(%[[FARR]] : !cir.ptr<!cir.array<!cir.float x 10>>) bounds(%[[BOUNDS]]) -> !cir.ptr<!cir.array<!cir.float x 10>> {name = "fArr[1:5]", structured = false}
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//
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// CHECK-NEXT: acc.loop cache(%[[CACHE1]], %[[CACHE2]] : !cir.ptr<!cir.array<!s32i x 10>>, !cir.ptr<!cir.array<!cir.float x 10>>) {
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// CHECK: acc.yield
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// CHECK-NEXT: } attributes {independent = [#acc.device_type<none>]}
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#pragma acc parallel loop
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for(int i = 0; i < 5; ++i) {
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#pragma acc cache(iArr[1], fArr[1:5])
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}
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// CHECK-NEXT: acc.parallel combined(loop) {
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// CHECK-NEXT: %[[ONE:.*]] = cir.const #cir.int<1>
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// CHECK-NEXT: %[[ONE_CAST:.*]] = builtin.unrealized_conversion_cast %[[ONE]] : !s32i to si32
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// CHECK-NEXT: %[[ONE_CONST:.*]] = arith.constant 1 : i64
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// CHECK-NEXT: %[[ZERO_CONST:.*]] = arith.constant 0 : i64
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// CHECK-NEXT: %[[ONE_CONST2:.*]] = arith.constant 1 : i64
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// CHECK-NEXT: %[[BOUNDS:.*]] = acc.bounds lowerbound(%[[ONE_CAST]] : si32) extent(%[[ONE_CONST]] : i64) stride(%[[ONE_CONST2]] : i64) startIdx(%[[ZERO_CONST]] : i64)
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// CHECK-NEXT: %[[CACHE1:.*]] = acc.cache varPtr(%[[IARR]] : !cir.ptr<!cir.array<!s32i x 10>>) bounds(%[[BOUNDS]]) -> !cir.ptr<!cir.array<!s32i x 10>> {name = "iArr[1]", structured = false}
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//
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// CHECK-NEXT: %[[ONE:.*]] = cir.const #cir.int<1>
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// CHECK-NEXT: %[[ONE_CAST:.*]] = builtin.unrealized_conversion_cast %[[ONE]] : !s32i to si32
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// CHECK-NEXT: %[[FIVE:.*]] = cir.const #cir.int<5>
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// CHECK-NEXT: %[[FIVE_CAST:.*]] = builtin.unrealized_conversion_cast %[[FIVE]] : !s32i to si32
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// CHECK-NEXT: %[[ZERO_CONST:.*]] = arith.constant 0 : i64
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// CHECK-NEXT: %[[ONE_CONST:.*]] = arith.constant 1 : i64
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// CHECK-NEXT: %[[BOUNDS:.*]] = acc.bounds lowerbound(%[[ONE_CAST]] : si32) extent(%[[FIVE_CAST]] : si32) stride(%[[ONE_CONST]] : i64) startIdx(%[[ZERO_CONST]] : i64)
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// CHECK-NEXT: %[[CACHE2:.*]] = acc.cache varPtr(%[[FARR]] : !cir.ptr<!cir.array<!cir.float x 10>>) bounds(%[[BOUNDS]]) -> !cir.ptr<!cir.array<!cir.float x 10>> {name = "fArr[1:5]", structured = false}
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//
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// CHECK-NEXT: acc.loop combined(parallel) cache(%[[CACHE1]], %[[CACHE2]] : !cir.ptr<!cir.array<!s32i x 10>>, !cir.ptr<!cir.array<!cir.float x 10>>) {
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// CHECK: acc.yield
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// CHECK-NEXT: } attributes {independent = [#acc.device_type<none>]}
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: } loc
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#pragma acc parallel loop
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for(int i = 0; i < 5; ++i) {
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int localArr[5];
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// The first term here isn't lowered, because it references data inside of the 'loop'.
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#pragma acc cache(localArr[i], iArr[1], fArr[1:5])
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}
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// CHECK-NEXT: acc.parallel combined(loop) {
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// CHECK-NEXT: %[[ONE:.*]] = cir.const #cir.int<1>
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// CHECK-NEXT: %[[ONE_CAST:.*]] = builtin.unrealized_conversion_cast %[[ONE]] : !s32i to si32
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// CHECK-NEXT: %[[ONE_CONST:.*]] = arith.constant 1 : i64
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// CHECK-NEXT: %[[ZERO_CONST:.*]] = arith.constant 0 : i64
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// CHECK-NEXT: %[[ONE_CONST2:.*]] = arith.constant 1 : i64
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// CHECK-NEXT: %[[BOUNDS:.*]] = acc.bounds lowerbound(%[[ONE_CAST]] : si32) extent(%[[ONE_CONST]] : i64) stride(%[[ONE_CONST2]] : i64) startIdx(%[[ZERO_CONST]] : i64)
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// CHECK-NEXT: %[[CACHE1:.*]] = acc.cache varPtr(%[[IARR]] : !cir.ptr<!cir.array<!s32i x 10>>) bounds(%[[BOUNDS]]) -> !cir.ptr<!cir.array<!s32i x 10>> {name = "iArr[1]", structured = false}
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//
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// CHECK-NEXT: %[[ONE:.*]] = cir.const #cir.int<1>
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// CHECK-NEXT: %[[ONE_CAST:.*]] = builtin.unrealized_conversion_cast %[[ONE]] : !s32i to si32
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// CHECK-NEXT: %[[FIVE:.*]] = cir.const #cir.int<5>
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// CHECK-NEXT: %[[FIVE_CAST:.*]] = builtin.unrealized_conversion_cast %[[FIVE]] : !s32i to si32
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// CHECK-NEXT: %[[ZERO_CONST:.*]] = arith.constant 0 : i64
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// CHECK-NEXT: %[[ONE_CONST:.*]] = arith.constant 1 : i64
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// CHECK-NEXT: %[[BOUNDS:.*]] = acc.bounds lowerbound(%[[ONE_CAST]] : si32) extent(%[[FIVE_CAST]] : si32) stride(%[[ONE_CONST]] : i64) startIdx(%[[ZERO_CONST]] : i64)
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// CHECK-NEXT: %[[CACHE2:.*]] = acc.cache varPtr(%[[FARR]] : !cir.ptr<!cir.array<!cir.float x 10>>) bounds(%[[BOUNDS]]) -> !cir.ptr<!cir.array<!cir.float x 10>> {name = "fArr[1:5]", structured = false}
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//
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// CHECK-NEXT: acc.loop combined(parallel) cache(%[[CACHE1]], %[[CACHE2]] : !cir.ptr<!cir.array<!s32i x 10>>, !cir.ptr<!cir.array<!cir.float x 10>>) {
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// CHECK: acc.yield
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// CHECK-NEXT: } attributes {independent = [#acc.device_type<none>]}
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// CHECK-NEXT: acc.yield
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// CHECK-NEXT: } loc
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}
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