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191 lines
5.5 KiB
Plaintext
191 lines
5.5 KiB
Plaintext
// RUN: cir-opt %s -cir-to-llvm -o %t.mlir
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// RUN: FileCheck --input-file=%t.mlir %s
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!s8i = !cir.int<s, 8>
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!s32i = !cir.int<s, 32>
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!s64i = !cir.int<s, 64>
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module {
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cir.func @shouldLowerSwitchWithDefault(%arg0: !s8i) {
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cir.switch (%arg0 : !s8i) {
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// CHECK: llvm.switch %arg0 : i8, ^bb[[#DEFAULT:]] [
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// CHECK: 1: ^bb[[#CASE1:]]
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// CHECK: ]
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cir.case (equal, [#cir.int<1> : !s8i]) {
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cir.break
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}
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// CHECK: ^bb[[#CASE1]]:
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// CHECK: llvm.br ^bb[[#EXIT:]]
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cir.case (default, []) {
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cir.break
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}
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// CHECK: ^bb[[#DEFAULT]]:
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// CHECK: llvm.br ^bb[[#EXIT]]
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cir.yield
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}
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// CHECK: ^bb[[#EXIT]]:
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cir.return
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}
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cir.func @shouldLowerSwitchWithoutDefault(%arg0: !s32i) {
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cir.switch (%arg0 : !s32i) {
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// Default block is the exit block:
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// CHECK: llvm.switch %arg0 : i32, ^bb[[#EXIT:]] [
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// CHECK: 1: ^bb[[#CASE1:]]
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// CHECK: ]
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cir.case (equal, [#cir.int<1> : !s32i]) {
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cir.break
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}
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// CHECK: ^bb[[#CASE1]]:
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// CHECK: llvm.br ^bb[[#EXIT]]
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cir.yield
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}
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// CHECK: ^bb[[#EXIT]]:
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cir.return
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}
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cir.func @shouldLowerSwitchWithImplicitFallthrough(%arg0: !s64i) {
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cir.switch (%arg0 : !s64i) {
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// CHECK: llvm.switch %arg0 : i64, ^bb[[#EXIT:]] [
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// CHECK: 1: ^bb[[#CASE1N2:]],
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// CHECK: 2: ^bb[[#CASE1N2]]
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// CHECK: ]
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cir.case (anyof, [#cir.int<1> : !s64i, #cir.int<2> : !s64i]) { // case 1 and 2 use same region
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cir.break
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}
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// CHECK: ^bb[[#CASE1N2]]:
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// CHECK: llvm.br ^bb[[#EXIT]]
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cir.yield
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}
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// CHECK: ^bb[[#EXIT]]:
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cir.return
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}
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cir.func @shouldLowerSwitchWithExplicitFallthrough(%arg0: !s64i) {
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cir.switch (%arg0 : !s64i) {
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// CHECK: llvm.switch %arg0 : i64, ^bb[[#EXIT:]] [
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// CHECK: 1: ^bb[[#CASE1:]],
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// CHECK: 2: ^bb[[#CASE2:]]
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// CHECK: ]
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cir.case (equal, [#cir.int<1> : !s64i]) { // case 1 has its own region
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cir.yield // fallthrough to case 2
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}
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// CHECK: ^bb[[#CASE1]]:
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// CHECK: llvm.br ^bb[[#CASE2]]
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cir.case (equal, [#cir.int<2> : !s64i]) {
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cir.break
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}
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// CHECK: ^bb[[#CASE2]]:
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// CHECK: llvm.br ^bb[[#EXIT]]
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cir.yield
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}
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// CHECK: ^bb[[#EXIT]]:
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cir.return
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}
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cir.func @shouldLowerSwitchWithFallthroughToExit(%arg0: !s64i) {
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cir.switch (%arg0 : !s64i) {
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// CHECK: llvm.switch %arg0 : i64, ^bb[[#EXIT:]] [
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// CHECK: 1: ^bb[[#CASE1:]]
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// CHECK: ]
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cir.case (equal, [#cir.int<1> : !s64i]) {
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cir.yield // fallthrough to exit
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}
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// CHECK: ^bb[[#CASE1]]:
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// CHECK: llvm.br ^bb[[#EXIT]]
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cir.yield
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}
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// CHECK: ^bb[[#EXIT]]:
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cir.return
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}
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cir.func @shouldDropEmptySwitch(%arg0: !s64i) {
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cir.switch (%arg0 : !s64i) {
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cir.yield
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}
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// CHECK-NOT: llvm.switch
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cir.return
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}
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cir.func @shouldLowerMultiBlockCase(%arg0: !s32i) {
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%0 = cir.alloca !s32i, !cir.ptr<!s32i>, ["a", init] {alignment = 4 : i64}
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cir.store %arg0, %0 : !s32i, !cir.ptr<!s32i>
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cir.scope {
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%1 = cir.load %0 : !cir.ptr<!s32i>, !s32i
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cir.switch (%1 : !s32i) {
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cir.case (equal, [#cir.int<3> : !s32i]) {
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cir.return
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^bb1: // no predecessors
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cir.break
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}
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cir.yield
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}
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}
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cir.return
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}
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// CHECK: llvm.func @shouldLowerMultiBlockCase
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// CHECK: ^bb1: // pred: ^bb0
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// CHECK: llvm.switch {{.*}} : i32, ^[[DEFAULT_BB:.+]] [
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// CHECK: 3: ^[[DIRECTLY_RET_BB:.+]]
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// CHECK: ]
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// CHECK: ^[[DIRECTLY_RET_BB]]:
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// CHECK: llvm.return
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// CHECK: ^[[DEFAULT_BB:.+]]:
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// CHECK: llvm.br ^[[RET_BB:.+]]
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// CHECK: ^[[RET_BB:.+]]: // pred: ^[[DEFAULT_BB:.+]]
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// CHECK: llvm.return
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// CHECK: }
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cir.func @shouldLowerNestedBreak(%arg0: !s32i, %arg1: !s32i) -> !s32i {
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%0 = cir.alloca !s32i, !cir.ptr<!s32i>, ["x", init] {alignment = 4 : i64}
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%1 = cir.alloca !s32i, !cir.ptr<!s32i>, ["y", init] {alignment = 4 : i64}
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%2 = cir.alloca !s32i, !cir.ptr<!s32i>, ["__retval"] {alignment = 4 : i64}
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cir.store %arg0, %0 : !s32i, !cir.ptr<!s32i>
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cir.store %arg1, %1 : !s32i, !cir.ptr<!s32i>
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cir.scope {
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%5 = cir.load %0 : !cir.ptr<!s32i>, !s32i
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cir.switch (%5 : !s32i) {
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cir.case (equal, [#cir.int<0> : !s32i]) {
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cir.scope {
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%6 = cir.load %1 : !cir.ptr<!s32i>, !s32i
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%7 = cir.const #cir.int<0> : !s32i
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%8 = cir.cmp ge %6, %7 : !s32i
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cir.if %8 {
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cir.break
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}
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}
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cir.break
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}
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cir.yield
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}
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}
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%3 = cir.const #cir.int<3> : !s32i
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cir.store %3, %2 : !s32i, !cir.ptr<!s32i>
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%4 = cir.load %2 : !cir.ptr<!s32i>, !s32i
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cir.return %4 : !s32i
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}
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// CHECK: llvm.func @shouldLowerNestedBreak
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// CHECK: llvm.switch %6 : i32, ^[[DEFAULT_BB:.+]] [
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// CHECK: 0: ^[[ZERO_BB:.+]]
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// CHECK: ]
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// CHECK: ^[[ZERO_BB]]:
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// CHECK: llvm.br ^[[ZERO_BB_SUCC:.+]]
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// CHECK: ^[[ZERO_BB_SUCC]]: // pred: ^[[ZERO_BB:]]
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// CHECK: llvm.cond_br {{%.*}}, ^[[DEFAULT_BB_PRED1:.+]], ^[[DEFAULT_BB_PRED12:.+]]
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// CHECK: ^[[DEFAULT_BB_PRED1]]: // pred: ^[[ZERO_BB_SUCC]]
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// CHECK: llvm.br ^[[DEFAULT_BB]]
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// CHECK: ^[[DEFAULT_BB_PRED12]]: // pred: ^[[ZERO_BB_SUCC]]
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// CHECK: llvm.br ^[[DEFAULT_BB_PRED1:.+]]
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// CHECK: ^[[DEFAULT_BB_PRED1]]: // pred: ^[[DEFAULT_BB_PRED12]]
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// CHECK: llvm.br ^[[DEFAULT_BB]]
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// CHECK: ^[[DEFAULT_BB]]:
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// CHECK: llvm.br ^[[RET_BB:.+]]
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// CHECK: ^[[RET_BB]]: // pred: ^[[DEFAULT_BB]]
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// CHECK: llvm.return
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}
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