derek.holloway
7502bf64a4
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571 lines
39 KiB
C
571 lines
39 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6
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// RUN: %clang_cc1 -O3 -triple powerpc64le-unknown-unknown -target-cpu future \
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// RUN: -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -O3 -triple powerpc64-ibm-aix -target-cpu future \
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// RUN: -emit-llvm %s -o - | FileCheck %s --check-prefix=AIX
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// CHECK-LABEL: define dso_local void @test_dmxvi8gerx4(
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// CHECK-SAME: ptr noundef readnone captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA5:![0-9]+]]
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// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4(<256 x i1> [[TMP0]], <16 x i8> [[VC]])
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// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7:![0-9]+]]
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// CHECK-NEXT: ret void
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//
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// AIX-LABEL: define void @test_dmxvi8gerx4(
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// AIX-SAME: ptr noundef readnone captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
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// AIX-NEXT: [[ENTRY:.*:]]
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// AIX-NEXT: [[TMP0:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA5:![0-9]+]]
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// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4(<256 x i1> [[TMP0]], <16 x i8> [[VC]])
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// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7:![0-9]+]]
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// AIX-NEXT: ret void
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//
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void test_dmxvi8gerx4(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) {
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__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
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__vector_pair vp = *((__vector_pair *)vpp);
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__builtin_mma_dmxvi8gerx4(&vdmr, vp, vc);
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*((__dmr1024 *)resp) = vdmr;
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}
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// CHECK-LABEL: define dso_local void @test_pmdmxvi8gerx4(
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// CHECK-SAME: ptr noundef readnone captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA5]]
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// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4(<256 x i1> [[TMP0]], <16 x i8> [[VC]], i32 0, i32 0, i32 0)
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// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// CHECK-NEXT: ret void
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//
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// AIX-LABEL: define void @test_pmdmxvi8gerx4(
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// AIX-SAME: ptr noundef readnone captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// AIX-NEXT: [[ENTRY:.*:]]
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// AIX-NEXT: [[TMP0:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA5]]
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// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4(<256 x i1> [[TMP0]], <16 x i8> [[VC]], i32 0, i32 0, i32 0)
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// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// AIX-NEXT: ret void
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//
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void test_pmdmxvi8gerx4(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) {
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__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
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__vector_pair vp = *((__vector_pair *)vpp);
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__builtin_mma_pmdmxvi8gerx4(&vdmr, vp, vc, 0, 0, 0);
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*((__dmr1024 *)resp) = vdmr;
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}
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// CHECK-LABEL: define dso_local void @test_dmxvi8gerx4pp(
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// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// CHECK-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA5]]
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// CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4pp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]])
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// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// CHECK-NEXT: ret void
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//
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// AIX-LABEL: define void @test_dmxvi8gerx4pp(
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// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// AIX-NEXT: [[ENTRY:.*:]]
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// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// AIX-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA5]]
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// AIX-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4pp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]])
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// AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// AIX-NEXT: ret void
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//
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void test_dmxvi8gerx4pp(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) {
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__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
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__vector_pair vp = *((__vector_pair *)vpp);
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__builtin_mma_dmxvi8gerx4pp(&vdmr, vp, vc);
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*((__dmr1024 *)resp) = vdmr;
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}
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// CHECK-LABEL: define dso_local void @test_pmdmxvi8gerx4pp(
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// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// CHECK-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA5]]
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// CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4pp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]], i32 0, i32 0, i32 0)
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// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// CHECK-NEXT: ret void
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//
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// AIX-LABEL: define void @test_pmdmxvi8gerx4pp(
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// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// AIX-NEXT: [[ENTRY:.*:]]
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// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// AIX-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA5]]
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// AIX-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4pp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]], i32 0, i32 0, i32 0)
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// AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// AIX-NEXT: ret void
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//
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void test_pmdmxvi8gerx4pp(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) {
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__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
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__vector_pair vp = *((__vector_pair *)vpp);
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__builtin_mma_pmdmxvi8gerx4pp(&vdmr, vp, vc, 0, 0, 0);
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*((__dmr1024 *)resp) = vdmr;
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}
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// CHECK-LABEL: define dso_local void @test_dmxvi8gerx4spp(
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// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// CHECK-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA5]]
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// CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4spp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]])
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// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// CHECK-NEXT: ret void
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//
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// AIX-LABEL: define void @test_dmxvi8gerx4spp(
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// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// AIX-NEXT: [[ENTRY:.*:]]
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// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// AIX-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA5]]
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// AIX-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4spp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]])
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// AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// AIX-NEXT: ret void
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//
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void test_dmxvi8gerx4spp(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) {
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__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
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__vector_pair vp = *((__vector_pair *)vpp);
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__builtin_mma_dmxvi8gerx4spp(&vdmr, vp, vc);
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*((__dmr1024 *)resp) = vdmr;
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}
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// CHECK-LABEL: define dso_local void @test_pmdmxvi8gerx4spp(
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// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// CHECK-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA5]]
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// CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4spp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]], i32 0, i32 0, i32 0)
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// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// CHECK-NEXT: ret void
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//
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// AIX-LABEL: define void @test_pmdmxvi8gerx4spp(
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// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// AIX-NEXT: [[ENTRY:.*:]]
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// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// AIX-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA5]]
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// AIX-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4spp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]], i32 0, i32 0, i32 0)
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// AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
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// AIX-NEXT: ret void
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//
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void test_pmdmxvi8gerx4spp(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) {
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__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
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__vector_pair vp = *((__vector_pair *)vpp);
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__builtin_mma_pmdmxvi8gerx4spp(&vdmr, vp, vc, 0, 0, 0);
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*((__dmr1024 *)resp) = vdmr;
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}
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// CHECK-LABEL: define dso_local void @test_dmf_basic(
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// CHECK-SAME: ptr noundef readonly captures(none) [[P:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RES1:%.*]], ptr noundef captures(none) [[RES2:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[TMP0:%.*]] = tail call <1024 x i1> @llvm.ppc.dmsetdmrz()
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// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmmr(<1024 x i1> [[TMP0]])
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// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RES1]], align 128
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// CHECK-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr [[RES2]], align 128
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// CHECK-NEXT: [[TMP3:%.*]] = load <1024 x i1>, ptr [[P]], align 128
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// CHECK-NEXT: [[TMP4:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxor(<1024 x i1> [[TMP2]], <1024 x i1> [[TMP3]])
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// CHECK-NEXT: store <1024 x i1> [[TMP4]], ptr [[RES2]], align 128
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// CHECK-NEXT: ret void
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//
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// AIX-LABEL: define void @test_dmf_basic(
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// AIX-SAME: ptr noundef readonly captures(none) [[P:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RES1:%.*]], ptr noundef captures(none) [[RES2:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// AIX-NEXT: [[ENTRY:.*:]]
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// AIX-NEXT: [[TMP0:%.*]] = tail call <1024 x i1> @llvm.ppc.dmsetdmrz()
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// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmmr(<1024 x i1> [[TMP0]])
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// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RES1]], align 128
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// AIX-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr [[RES2]], align 128
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// AIX-NEXT: [[TMP3:%.*]] = load <1024 x i1>, ptr [[P]], align 128
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// AIX-NEXT: [[TMP4:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxor(<1024 x i1> [[TMP2]], <1024 x i1> [[TMP3]])
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// AIX-NEXT: store <1024 x i1> [[TMP4]], ptr [[RES2]], align 128
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// AIX-NEXT: ret void
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//
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void test_dmf_basic(char *p, char *res1, char *res2) {
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__dmr1024 x[2];
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__builtin_dmsetdmrz(&x[0]);
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__builtin_dmmr((__dmr1024*)res1, &x[0]);
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__builtin_dmxor((__dmr1024*)res2, (__dmr1024*)p);
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}
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// CHECK-LABEL: define dso_local void @test_dmf_basic2(
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// CHECK-SAME: ptr noundef readonly captures(none) [[P1:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RES1:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RES2:%.*]], ptr noundef readonly captures(none) [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[V]], align 16, !tbaa [[CHAR_TBAA9:![0-9]+]]
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// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.build.dmr(<16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]])
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// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RES2]], align 128
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// CHECK-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr [[P1]], align 128
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// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RES1]], align 128
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// CHECK-NEXT: ret void
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//
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// AIX-LABEL: define void @test_dmf_basic2(
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// AIX-SAME: ptr noundef readonly captures(none) [[P1:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RES1:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RES2:%.*]], ptr noundef readonly captures(none) [[V:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[V]], align 16, !tbaa [[CHAR_TBAA9:![0-9]+]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.build.dmr(<16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]])
|
|
// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RES2]], align 128
|
|
// AIX-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr [[P1]], align 128
|
|
// AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RES1]], align 128
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmf_basic2(char *p1, char *res1, char *res2,
|
|
vector unsigned char *v) {
|
|
vector unsigned char vv = *v;
|
|
__builtin_build_dmr((__dmr1024*)res2, vv, vv, vv, vv, vv, vv, vv, vv);
|
|
__builtin_disassemble_dmr(res1, (__dmr1024*)p1);
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmsha2hash(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP1:%.*]], ptr noundef readonly captures(none) [[VDMRP2:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP1]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load <1024 x i1>, ptr [[VDMRP2]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.dmsha2hash(<1024 x i1> [[TMP0]], <1024 x i1> [[TMP1]], i32 1)
|
|
// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmsha2hash(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP1:%.*]], ptr noundef readonly captures(none) [[VDMRP2:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP1]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = load <1024 x i1>, ptr [[VDMRP2]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.dmsha2hash(<1024 x i1> [[TMP0]], <1024 x i1> [[TMP1]], i32 1)
|
|
// AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmsha2hash(unsigned char *vdmrp1, unsigned char *vdmrp2, unsigned char *resp) {
|
|
__dmr1024 vdmr1 = *((__dmr1024 *)vdmrp1);
|
|
__dmr1024 vdmr2 = *((__dmr1024 *)vdmrp2);
|
|
__builtin_dmsha2hash(&vdmr1, &vdmr2, 1);
|
|
*((__dmr1024 *)resp) = vdmr1;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmsha3hash(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRPP:%.*]], ptr noundef writeonly captures(none) initializes((0, 256)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <2048 x i1>, ptr [[VDMRPP]], align 256, !tbaa [[__DMR2048_TBAA10:![0-9]+]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = tail call <2048 x i1> @llvm.ppc.dmsha3hash(<2048 x i1> [[TMP0]], i32 4)
|
|
// CHECK-NEXT: store <2048 x i1> [[TMP1]], ptr [[RESP]], align 256, !tbaa [[__DMR2048_TBAA10]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmsha3hash(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRPP:%.*]], ptr noundef writeonly captures(none) initializes((0, 256)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <2048 x i1>, ptr [[VDMRPP]], align 256, !tbaa [[__DMR2048_TBAA10:![0-9]+]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <2048 x i1> @llvm.ppc.dmsha3hash(<2048 x i1> [[TMP0]], i32 4)
|
|
// AIX-NEXT: store <2048 x i1> [[TMP1]], ptr [[RESP]], align 256, !tbaa [[__DMR2048_TBAA10]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmsha3hash(unsigned char *vdmrpp, unsigned char *resp) {
|
|
__dmr2048 vdmrp = *((__dmr2048 *)vdmrpp);
|
|
__builtin_dmsha3hash(&vdmrp, 4);
|
|
*((__dmr2048 *)resp) = vdmrp;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmxxshapad(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 2, i32 1, i32 3)
|
|
// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmxxshapad(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 2, i32 1, i32 3)
|
|
// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmxxshapad(unsigned char *vdmrp, vector unsigned char vc, unsigned char *resp) {
|
|
__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
|
|
__builtin_dmxxshapad(&vdmr, vc, 2, 1, 3);
|
|
*((__dmr1024 *)resp) = vdmr;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmsha256hash(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP1:%.*]], ptr noundef readonly captures(none) [[VDMRP2:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP1]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load <1024 x i1>, ptr [[VDMRP2]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.dmsha2hash(<1024 x i1> [[TMP0]], <1024 x i1> [[TMP1]], i32 0)
|
|
// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmsha256hash(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP1:%.*]], ptr noundef readonly captures(none) [[VDMRP2:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP1]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = load <1024 x i1>, ptr [[VDMRP2]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.dmsha2hash(<1024 x i1> [[TMP0]], <1024 x i1> [[TMP1]], i32 0)
|
|
// AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmsha256hash(unsigned char *vdmrp1, unsigned char *vdmrp2, unsigned char *resp) {
|
|
__dmr1024 vdmr1 = *((__dmr1024 *)vdmrp1);
|
|
__dmr1024 vdmr2 = *((__dmr1024 *)vdmrp2);
|
|
__builtin_dmsha256hash(&vdmr1, &vdmr2);
|
|
*((__dmr1024 *)resp) = vdmr1;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmsha512hash(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP1:%.*]], ptr noundef readonly captures(none) [[VDMRP2:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP1]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load <1024 x i1>, ptr [[VDMRP2]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.dmsha2hash(<1024 x i1> [[TMP0]], <1024 x i1> [[TMP1]], i32 1)
|
|
// CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmsha512hash(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP1:%.*]], ptr noundef readonly captures(none) [[VDMRP2:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP1]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = load <1024 x i1>, ptr [[VDMRP2]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.dmsha2hash(<1024 x i1> [[TMP0]], <1024 x i1> [[TMP1]], i32 1)
|
|
// AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmsha512hash(unsigned char *vdmrp1, unsigned char *vdmrp2, unsigned char *resp) {
|
|
__dmr1024 vdmr1 = *((__dmr1024 *)vdmrp1);
|
|
__dmr1024 vdmr2 = *((__dmr1024 *)vdmrp2);
|
|
__builtin_dmsha512hash(&vdmr1, &vdmr2);
|
|
*((__dmr1024 *)resp) = vdmr1;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmsha3dw(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRPP:%.*]], ptr noundef writeonly captures(none) initializes((0, 256)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <2048 x i1>, ptr [[VDMRPP]], align 256, !tbaa [[__DMR2048_TBAA10]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = tail call <2048 x i1> @llvm.ppc.dmsha3hash(<2048 x i1> [[TMP0]], i32 0)
|
|
// CHECK-NEXT: store <2048 x i1> [[TMP1]], ptr [[RESP]], align 256, !tbaa [[__DMR2048_TBAA10]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmsha3dw(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRPP:%.*]], ptr noundef writeonly captures(none) initializes((0, 256)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <2048 x i1>, ptr [[VDMRPP]], align 256, !tbaa [[__DMR2048_TBAA10]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <2048 x i1> @llvm.ppc.dmsha3hash(<2048 x i1> [[TMP0]], i32 0)
|
|
// AIX-NEXT: store <2048 x i1> [[TMP1]], ptr [[RESP]], align 256, !tbaa [[__DMR2048_TBAA10]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmsha3dw(unsigned char *vdmrpp, unsigned char *resp) {
|
|
__dmr2048 vdmrp = *((__dmr2048 *)vdmrpp);
|
|
__builtin_dmsha3dw(&vdmrp);
|
|
*((__dmr2048 *)resp) = vdmrp;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmcryshash(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRPP:%.*]], ptr noundef writeonly captures(none) initializes((0, 256)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <2048 x i1>, ptr [[VDMRPP]], align 256, !tbaa [[__DMR2048_TBAA10]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = tail call <2048 x i1> @llvm.ppc.dmsha3hash(<2048 x i1> [[TMP0]], i32 12)
|
|
// CHECK-NEXT: store <2048 x i1> [[TMP1]], ptr [[RESP]], align 256, !tbaa [[__DMR2048_TBAA10]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmcryshash(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRPP:%.*]], ptr noundef writeonly captures(none) initializes((0, 256)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <2048 x i1>, ptr [[VDMRPP]], align 256, !tbaa [[__DMR2048_TBAA10]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <2048 x i1> @llvm.ppc.dmsha3hash(<2048 x i1> [[TMP0]], i32 12)
|
|
// AIX-NEXT: store <2048 x i1> [[TMP1]], ptr [[RESP]], align 256, !tbaa [[__DMR2048_TBAA10]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmcryshash(unsigned char *vdmrpp, unsigned char *resp) {
|
|
__dmr2048 vdmrp = *((__dmr2048 *)vdmrpp);
|
|
__builtin_dmcryshash(&vdmrp);
|
|
*((__dmr2048 *)resp) = vdmrp;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmxxsha3512pad(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 0, i32 0, i32 0)
|
|
// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmxxsha3512pad(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 0, i32 0, i32 0)
|
|
// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmxxsha3512pad(unsigned char *vdmrp, vector unsigned char vc, unsigned char *resp) {
|
|
__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
|
|
__builtin_dmxxsha3512pad(&vdmr, vc, 0);
|
|
*((__dmr1024 *)resp) = vdmr;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmxxsha3384pad(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 0, i32 1, i32 1)
|
|
// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmxxsha3384pad(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 0, i32 1, i32 1)
|
|
// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmxxsha3384pad(unsigned char *vdmrp, vector unsigned char vc, unsigned char *resp) {
|
|
__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
|
|
__builtin_dmxxsha3384pad(&vdmr, vc, 1);
|
|
*((__dmr1024 *)resp) = vdmr;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmxxsha3256pad(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 0, i32 0, i32 2)
|
|
// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmxxsha3256pad(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 0, i32 0, i32 2)
|
|
// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmxxsha3256pad(unsigned char *vdmrp, vector unsigned char vc, unsigned char *resp) {
|
|
__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
|
|
__builtin_dmxxsha3256pad(&vdmr, vc, 0);
|
|
*((__dmr1024 *)resp) = vdmr;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmxxsha3224pad(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 0, i32 1, i32 3)
|
|
// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmxxsha3224pad(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 0, i32 1, i32 3)
|
|
// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmxxsha3224pad(unsigned char *vdmrp, vector unsigned char vc, unsigned char *resp) {
|
|
__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
|
|
__builtin_dmxxsha3224pad(&vdmr, vc, 1);
|
|
*((__dmr1024 *)resp) = vdmr;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmxxshake256pad(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 1, i32 0, i32 0)
|
|
// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmxxshake256pad(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 1, i32 0, i32 0)
|
|
// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmxxshake256pad(unsigned char *vdmrp, vector unsigned char vc, unsigned char *resp) {
|
|
__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
|
|
__builtin_dmxxshake256pad(&vdmr, vc, 0);
|
|
*((__dmr1024 *)resp) = vdmr;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmxxshake128pad(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 1, i32 1, i32 1)
|
|
// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmxxshake128pad(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 1, i32 1, i32 1)
|
|
// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmxxshake128pad(unsigned char *vdmrp, vector unsigned char vc, unsigned char *resp) {
|
|
__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
|
|
__builtin_dmxxshake128pad(&vdmr, vc, 1);
|
|
*((__dmr1024 *)resp) = vdmr;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmxxsha384512pad(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 2, i32 0, i32 0)
|
|
// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmxxsha384512pad(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 2, i32 0, i32 0)
|
|
// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmxxsha384512pad(unsigned char *vdmrp, vector unsigned char vc, unsigned char *resp) {
|
|
__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
|
|
__builtin_dmxxsha384512pad(&vdmr, vc);
|
|
*((__dmr1024 *)resp) = vdmr;
|
|
}
|
|
|
|
// CHECK-LABEL: define dso_local void @test_dmxxsha224256pad(
|
|
// CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 3, i32 0, i32 0)
|
|
// CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
// AIX-LABEL: define void @test_dmxxsha224256pad(
|
|
// AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
|
|
// AIX-NEXT: [[ENTRY:.*:]]
|
|
// AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.dmxxshapad(<1024 x i1> [[TMP0]], <16 x i8> [[VC]], i32 3, i32 0, i32 0)
|
|
// AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA7]]
|
|
// AIX-NEXT: ret void
|
|
//
|
|
void test_dmxxsha224256pad(unsigned char *vdmrp, vector unsigned char vc, unsigned char *resp) {
|
|
__dmr1024 vdmr = *((__dmr1024 *)vdmrp);
|
|
__builtin_dmxxsha224256pad(&vdmr, vc);
|
|
*((__dmr1024 *)resp) = vdmr;
|
|
}
|
|
//.
|
|
// CHECK: [[META3:![0-9]+]] = !{!"omnipotent char", [[META4:![0-9]+]], i64 0}
|
|
// CHECK: [[META4]] = !{!"Simple C/C++ TBAA"}
|
|
// CHECK: [[__VECTOR_PAIR_TBAA5]] = !{[[META6:![0-9]+]], [[META6]], i64 0}
|
|
// CHECK: [[META6]] = !{!"__vector_pair", [[META3]], i64 0}
|
|
// CHECK: [[__DMR1024_TBAA7]] = !{[[META8:![0-9]+]], [[META8]], i64 0}
|
|
// CHECK: [[META8]] = !{!"__dmr1024", [[META3]], i64 0}
|
|
// CHECK: [[CHAR_TBAA9]] = !{[[META3]], [[META3]], i64 0}
|
|
// CHECK: [[__DMR2048_TBAA10]] = !{[[META11:![0-9]+]], [[META11]], i64 0}
|
|
// CHECK: [[META11]] = !{!"__dmr2048", [[META3]], i64 0}
|
|
//.
|
|
// AIX: [[META3:![0-9]+]] = !{!"omnipotent char", [[META4:![0-9]+]], i64 0}
|
|
// AIX: [[META4]] = !{!"Simple C/C++ TBAA"}
|
|
// AIX: [[__VECTOR_PAIR_TBAA5]] = !{[[META6:![0-9]+]], [[META6]], i64 0}
|
|
// AIX: [[META6]] = !{!"__vector_pair", [[META3]], i64 0}
|
|
// AIX: [[__DMR1024_TBAA7]] = !{[[META8:![0-9]+]], [[META8]], i64 0}
|
|
// AIX: [[META8]] = !{!"__dmr1024", [[META3]], i64 0}
|
|
// AIX: [[CHAR_TBAA9]] = !{[[META3]], [[META3]], i64 0}
|
|
// AIX: [[__DMR2048_TBAA10]] = !{[[META11:![0-9]+]], [[META11]], i64 0}
|
|
// AIX: [[META11]] = !{!"__dmr2048", [[META3]], i64 0}
|
|
//.
|