derek.holloway
7502bf64a4
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113 lines
3.3 KiB
C
113 lines
3.3 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -triple riscv32 -target-feature +zbb -emit-llvm %s -o - \
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// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \
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// RUN: | FileCheck %s -check-prefix=RV32ZBB
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// RUN: %clang_cc1 -triple riscv64 -target-feature +zbb -emit-llvm %s -o - \
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// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \
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// RUN: | FileCheck %s -check-prefix=RV64ZBB
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#include <riscv_bitmanip.h>
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// RV32ZBB-LABEL: @orc_b_32(
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// RV32ZBB-NEXT: entry:
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// RV32ZBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.orc.b.i32(i32 [[A:%.*]])
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// RV32ZBB-NEXT: ret i32 [[TMP0]]
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//
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// RV64ZBB-LABEL: @orc_b_32(
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// RV64ZBB-NEXT: entry:
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// RV64ZBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.orc.b.i32(i32 [[A:%.*]])
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// RV64ZBB-NEXT: ret i32 [[TMP0]]
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//
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uint32_t orc_b_32(uint32_t a) {
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return __riscv_orc_b_32(a);
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}
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#if __riscv_xlen == 64
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// RV64ZBB-LABEL: @orc_b_64(
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// RV64ZBB-NEXT: entry:
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// RV64ZBB-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.orc.b.i64(i64 [[A:%.*]])
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// RV64ZBB-NEXT: ret i64 [[TMP0]]
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//
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uint64_t orc_b_64(uint64_t a) {
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return __riscv_orc_b_64(a);
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}
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#endif
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// RV32ZBB-LABEL: @clz_32(
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// RV32ZBB-NEXT: entry:
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// RV32ZBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.ctlz.i32(i32 [[A:%.*]], i1 false)
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// RV32ZBB-NEXT: ret i32 [[TMP0]]
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//
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// RV64ZBB-LABEL: @clz_32(
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// RV64ZBB-NEXT: entry:
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// RV64ZBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.ctlz.i32(i32 [[A:%.*]], i1 false)
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// RV64ZBB-NEXT: ret i32 [[TMP0]]
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//
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unsigned int clz_32(uint32_t a) {
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return __riscv_clz_32(a);
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}
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#if __riscv_xlen == 64
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// RV64ZBB-LABEL: @clz_64(
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// RV64ZBB-NEXT: entry:
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// RV64ZBB-NEXT: [[TMP0:%.*]] = call i64 @llvm.ctlz.i64(i64 [[A:%.*]], i1 false)
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// RV64ZBB-NEXT: [[CAST_I:%.*]] = trunc i64 [[TMP0]] to i32
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// RV64ZBB-NEXT: ret i32 [[CAST_I]]
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//
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unsigned int clz_64(uint64_t a) {
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return __riscv_clz_64(a);
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}
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#endif
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// RV32ZBB-LABEL: @ctz_32(
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// RV32ZBB-NEXT: entry:
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// RV32ZBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 false)
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// RV32ZBB-NEXT: ret i32 [[TMP0]]
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//
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// RV64ZBB-LABEL: @ctz_32(
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// RV64ZBB-NEXT: entry:
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// RV64ZBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 false)
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// RV64ZBB-NEXT: ret i32 [[TMP0]]
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//
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unsigned int ctz_32(uint32_t a) {
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return __riscv_ctz_32(a);
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}
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#if __riscv_xlen == 64
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// RV64ZBB-LABEL: @ctz_64(
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// RV64ZBB-NEXT: entry:
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// RV64ZBB-NEXT: [[TMP0:%.*]] = call i64 @llvm.cttz.i64(i64 [[A:%.*]], i1 false)
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// RV64ZBB-NEXT: [[CAST_I:%.*]] = trunc i64 [[TMP0]] to i32
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// RV64ZBB-NEXT: ret i32 [[CAST_I]]
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//
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unsigned int ctz_64(uint64_t a) {
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return __riscv_ctz_64(a);
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}
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#endif
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// RV32ZBB-LABEL: @cpop_32(
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// RV32ZBB-NEXT: entry:
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// RV32ZBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.ctpop.i32(i32 [[A:%.*]])
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// RV32ZBB-NEXT: ret i32 [[TMP0]]
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//
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// RV64ZBB-LABEL: @cpop_32(
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// RV64ZBB-NEXT: entry:
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// RV64ZBB-NEXT: [[TMP0:%.*]] = call i32 @llvm.ctpop.i32(i32 [[A:%.*]])
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// RV64ZBB-NEXT: ret i32 [[TMP0]]
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//
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unsigned int cpop_32(uint32_t a) {
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return __riscv_cpop_32(a);
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}
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#if __riscv_xlen == 64
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// RV64ZBB-LABEL: @cpop_64(
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// RV64ZBB-NEXT: entry:
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// RV64ZBB-NEXT: [[TMP0:%.*]] = call i64 @llvm.ctpop.i64(i64 [[A:%.*]])
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// RV64ZBB-NEXT: [[CAST_I:%.*]] = trunc i64 [[TMP0]] to i32
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// RV64ZBB-NEXT: ret i32 [[CAST_I]]
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//
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unsigned int cpop_64(uint64_t a) {
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return __riscv_cpop_64(a);
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}
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#endif
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