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TheRock/compiler/amd-llvm/clang/test/CodeGen/arm-mve-intrinsics/vrnd.c
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Flatten subprojects into a single base monorepo
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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s --check-prefixes=CHECK,CHECK-NOSTRICT
// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes='mem2reg,sroa,early-cse<>' | FileCheck %s --check-prefixes=CHECK,CHECK-NOSTRICT
// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -frounding-math -fexperimental-strict-floating-point -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s --check-prefixes=CHECK,CHECK-STRICT
// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -frounding-math -fexperimental-strict-floating-point -DPOLYMORPHIC -emit-llvm -o - %s | opt -S -passes='mem2reg,sroa,early-cse<>' | FileCheck %s --check-prefixes=CHECK,CHECK-STRICT
// REQUIRES: aarch64-registered-target || arm-registered-target
#include <arm_mve.h>
// CHECK-NOSTRICT-LABEL: @test_vrndaq_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.round.v8f16(<8 x half> [[A:%.*]])
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP0]]
//
// CHECK-STRICT-LABEL: @test_vrndaq_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vrinta.v8f16(<8 x half> [[A:%.*]]) #[[ATTR3:[0-9]+]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP0]]
//
float16x8_t test_vrndaq_f16(float16x8_t a)
{
#ifdef POLYMORPHIC
return vrndaq(a);
#else /* POLYMORPHIC */
return vrndaq_f16(a);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndaq_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> [[A:%.*]])
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP0]]
//
// CHECK-STRICT-LABEL: @test_vrndaq_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vrinta.v4f32(<4 x float> [[A:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP0]]
//
float32x4_t test_vrndaq_f32(float32x4_t a)
{
#ifdef POLYMORPHIC
return vrndaq(a);
#else /* POLYMORPHIC */
return vrndaq_f32(a);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndmq_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.floor.v8f16(<8 x half> [[A:%.*]])
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP0]]
//
// CHECK-STRICT-LABEL: @test_vrndmq_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vrintm.v8f16(<8 x half> [[A:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP0]]
//
float16x8_t test_vrndmq_f16(float16x8_t a)
{
#ifdef POLYMORPHIC
return vrndmq(a);
#else /* POLYMORPHIC */
return vrndmq_f16(a);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndmq_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> [[A:%.*]])
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP0]]
//
// CHECK-STRICT-LABEL: @test_vrndmq_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vrintm.v4f32(<4 x float> [[A:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP0]]
//
float32x4_t test_vrndmq_f32(float32x4_t a)
{
#ifdef POLYMORPHIC
return vrndmq(a);
#else /* POLYMORPHIC */
return vrndmq_f32(a);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndpq_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.ceil.v8f16(<8 x half> [[A:%.*]])
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP0]]
//
// CHECK-STRICT-LABEL: @test_vrndpq_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vrintp.v8f16(<8 x half> [[A:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP0]]
//
float16x8_t test_vrndpq_f16(float16x8_t a)
{
#ifdef POLYMORPHIC
return vrndpq(a);
#else /* POLYMORPHIC */
return vrndpq_f16(a);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndpq_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> [[A:%.*]])
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP0]]
//
// CHECK-STRICT-LABEL: @test_vrndpq_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vrintp.v4f32(<4 x float> [[A:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP0]]
//
float32x4_t test_vrndpq_f32(float32x4_t a)
{
#ifdef POLYMORPHIC
return vrndpq(a);
#else /* POLYMORPHIC */
return vrndpq_f32(a);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndq_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.trunc.v8f16(<8 x half> [[A:%.*]])
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP0]]
//
// CHECK-STRICT-LABEL: @test_vrndq_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vrintz.v8f16(<8 x half> [[A:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP0]]
//
float16x8_t test_vrndq_f16(float16x8_t a)
{
#ifdef POLYMORPHIC
return vrndq(a);
#else /* POLYMORPHIC */
return vrndq_f16(a);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndq_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> [[A:%.*]])
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP0]]
//
// CHECK-STRICT-LABEL: @test_vrndq_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vrintz.v4f32(<4 x float> [[A:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP0]]
//
float32x4_t test_vrndq_f32(float32x4_t a)
{
#ifdef POLYMORPHIC
return vrndq(a);
#else /* POLYMORPHIC */
return vrndq_f32(a);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndxq_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.rint.v8f16(<8 x half> [[A:%.*]])
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP0]]
//
// CHECK-STRICT-LABEL: @test_vrndxq_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vrintx.v8f16(<8 x half> [[A:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP0]]
//
float16x8_t test_vrndxq_f16(float16x8_t a)
{
#ifdef POLYMORPHIC
return vrndxq(a);
#else /* POLYMORPHIC */
return vrndxq_f16(a);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndxq_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> [[A:%.*]])
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP0]]
//
// CHECK-STRICT-LABEL: @test_vrndxq_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vrintx.v4f32(<4 x float> [[A:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP0]]
//
float32x4_t test_vrndxq_f32(float32x4_t a)
{
#ifdef POLYMORPHIC
return vrndxq(a);
#else /* POLYMORPHIC */
return vrndxq_f32(a);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndnq_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.roundeven.v8f16(<8 x half> [[A:%.*]])
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP0]]
//
// CHECK-STRICT-LABEL: @test_vrndnq_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.roundeven.v8f16(<8 x half> [[A:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP0]]
//
float16x8_t test_vrndnq_f16(float16x8_t a)
{
#ifdef POLYMORPHIC
return vrndnq(a);
#else /* POLYMORPHIC */
return vrndnq_f16(a);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndnq_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.roundeven.v4f32(<4 x float> [[A:%.*]])
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP0]]
//
// CHECK-STRICT-LABEL: @test_vrndnq_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.roundeven.v4f32(<4 x float> [[A:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP0]]
//
float32x4_t test_vrndnq_f32(float32x4_t a)
{
#ifdef POLYMORPHIC
return vrndnq(a);
#else /* POLYMORPHIC */
return vrndnq_f32(a);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndaq_m_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrinta.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]])
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndaq_m_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrinta.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vrndaq_m_f16(float16x8_t inactive, float16x8_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndaq_m(inactive, a, p);
#else /* POLYMORPHIC */
return vrndaq_m_f16(inactive, a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndaq_m_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrinta.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]])
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndaq_m_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrinta.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vrndaq_m_f32(float32x4_t inactive, float32x4_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndaq_m(inactive, a, p);
#else /* POLYMORPHIC */
return vrndaq_m_f32(inactive, a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndmq_m_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintm.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]])
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndmq_m_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintm.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vrndmq_m_f16(float16x8_t inactive, float16x8_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndmq_m(inactive, a, p);
#else /* POLYMORPHIC */
return vrndmq_m_f16(inactive, a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndmq_m_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintm.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]])
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndmq_m_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintm.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vrndmq_m_f32(float32x4_t inactive, float32x4_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndmq_m(inactive, a, p);
#else /* POLYMORPHIC */
return vrndmq_m_f32(inactive, a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndnq_m_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintn.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]])
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndnq_m_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintn.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vrndnq_m_f16(float16x8_t inactive, float16x8_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndnq_m(inactive, a, p);
#else /* POLYMORPHIC */
return vrndnq_m_f16(inactive, a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndnq_m_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintn.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]])
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndnq_m_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintn.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vrndnq_m_f32(float32x4_t inactive, float32x4_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndnq_m(inactive, a, p);
#else /* POLYMORPHIC */
return vrndnq_m_f32(inactive, a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndpq_m_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintp.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]])
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndpq_m_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintp.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vrndpq_m_f16(float16x8_t inactive, float16x8_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndpq_m(inactive, a, p);
#else /* POLYMORPHIC */
return vrndpq_m_f16(inactive, a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndpq_m_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintp.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]])
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndpq_m_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintp.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vrndpq_m_f32(float32x4_t inactive, float32x4_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndpq_m(inactive, a, p);
#else /* POLYMORPHIC */
return vrndpq_m_f32(inactive, a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndq_m_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintz.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]])
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndq_m_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintz.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vrndq_m_f16(float16x8_t inactive, float16x8_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndq_m(inactive, a, p);
#else /* POLYMORPHIC */
return vrndq_m_f16(inactive, a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndq_m_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintz.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]])
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndq_m_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintz.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vrndq_m_f32(float32x4_t inactive, float32x4_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndq_m(inactive, a, p);
#else /* POLYMORPHIC */
return vrndq_m_f32(inactive, a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndxq_m_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintx.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]])
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndxq_m_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintx.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> [[INACTIVE:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vrndxq_m_f16(float16x8_t inactive, float16x8_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndxq_m(inactive, a, p);
#else /* POLYMORPHIC */
return vrndxq_m_f16(inactive, a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndxq_m_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintx.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]])
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndxq_m_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintx.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> [[INACTIVE:%.*]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vrndxq_m_f32(float32x4_t inactive, float32x4_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndxq_m(inactive, a, p);
#else /* POLYMORPHIC */
return vrndxq_m_f32(inactive, a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndaq_x_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrinta.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> undef)
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndaq_x_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrinta.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> undef) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vrndaq_x_f16(float16x8_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndaq_x(a, p);
#else /* POLYMORPHIC */
return vrndaq_x_f16(a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndaq_x_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrinta.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> undef)
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndaq_x_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrinta.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> undef) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vrndaq_x_f32(float32x4_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndaq_x(a, p);
#else /* POLYMORPHIC */
return vrndaq_x_f32(a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndmq_x_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintm.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> undef)
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndmq_x_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintm.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> undef) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vrndmq_x_f16(float16x8_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndmq_x(a, p);
#else /* POLYMORPHIC */
return vrndmq_x_f16(a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndmq_x_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintm.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> undef)
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndmq_x_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintm.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> undef) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vrndmq_x_f32(float32x4_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndmq_x(a, p);
#else /* POLYMORPHIC */
return vrndmq_x_f32(a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndnq_x_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintn.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> undef)
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndnq_x_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintn.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> undef) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vrndnq_x_f16(float16x8_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndnq_x(a, p);
#else /* POLYMORPHIC */
return vrndnq_x_f16(a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndnq_x_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintn.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> undef)
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndnq_x_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintn.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> undef) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vrndnq_x_f32(float32x4_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndnq_x(a, p);
#else /* POLYMORPHIC */
return vrndnq_x_f32(a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndpq_x_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintp.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> undef)
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndpq_x_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintp.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> undef) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vrndpq_x_f16(float16x8_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndpq_x(a, p);
#else /* POLYMORPHIC */
return vrndpq_x_f16(a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndpq_x_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintp.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> undef)
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndpq_x_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintp.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> undef) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vrndpq_x_f32(float32x4_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndpq_x(a, p);
#else /* POLYMORPHIC */
return vrndpq_x_f32(a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndq_x_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintz.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> undef)
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndq_x_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintz.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> undef) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vrndq_x_f16(float16x8_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndq_x(a, p);
#else /* POLYMORPHIC */
return vrndq_x_f16(a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndq_x_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintz.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> undef)
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndq_x_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintz.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> undef) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vrndq_x_f32(float32x4_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndq_x(a, p);
#else /* POLYMORPHIC */
return vrndq_x_f32(a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndxq_x_f16(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintx.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> undef)
// CHECK-NOSTRICT-NEXT: ret <8 x half> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndxq_x_f16(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.arm.mve.vrintx.predicated.v8f16.v8i1(<8 x half> [[A:%.*]], <8 x i1> [[TMP1]], <8 x half> undef) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vrndxq_x_f16(float16x8_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndxq_x(a, p);
#else /* POLYMORPHIC */
return vrndxq_x_f16(a, p);
#endif /* POLYMORPHIC */
}
// CHECK-NOSTRICT-LABEL: @test_vrndxq_x_f32(
// CHECK-NOSTRICT-NEXT: entry:
// CHECK-NOSTRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NOSTRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NOSTRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintx.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> undef)
// CHECK-NOSTRICT-NEXT: ret <4 x float> [[TMP2]]
//
// CHECK-STRICT-LABEL: @test_vrndxq_x_f32(
// CHECK-STRICT-NEXT: entry:
// CHECK-STRICT-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-STRICT-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]]) #[[ATTR3]]
// CHECK-STRICT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.arm.mve.vrintx.predicated.v4f32.v4i1(<4 x float> [[A:%.*]], <4 x i1> [[TMP1]], <4 x float> undef) #[[ATTR3]]
// CHECK-STRICT-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vrndxq_x_f32(float32x4_t a, mve_pred16_t p)
{
#ifdef POLYMORPHIC
return vrndxq_x(a, p);
#else /* POLYMORPHIC */
return vrndxq_x_f32(a, p);
#endif /* POLYMORPHIC */
}
//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
// CHECK: {{.*}}
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