derek.holloway
7502bf64a4
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261 lines
11 KiB
HLSL
261 lines
11 KiB
HLSL
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
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// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
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// RUN: -fnative-int16-type -emit-llvm -O1 -o - | FileCheck %s -DTARGET=dx \
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// RUN: --check-prefixes=CHECK,DXCHECK
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// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
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// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
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// RUN: -fnative-int16-type -emit-llvm -O1 -o - | FileCheck %s -DTARGET=spv
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#ifdef __HLSL_ENABLE_16_BIT
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// CHECK-LABEL: test_firstbithigh_ushort
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// CHECK: [[FBH:%.*]] = tail call {{.*}}i32 @llvm.[[TARGET]].firstbituhigh.i16
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// DXCHECK-NEXT: [[SUB:%.*]] = sub i32 15, [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq i32 [[FBH]], -1
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// DXCHECK-NEXT: select i1 %cmp.i.i, i32 -1, i32 [[SUB]]
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// CHECK-NEXT: ret i32
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uint test_firstbithigh_ushort(uint16_t p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_ushort2
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<2 x i32> @llvm.[[TARGET]].firstbituhigh.v2i16
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <2 x i32> splat (i32 15), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <2 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <2 x i1> %cmp.i.i, <2 x i32> splat (i32 -1), <2 x i32> [[SUB]]
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// CHECK-NEXT: ret <2 x i32>
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uint2 test_firstbithigh_ushort2(uint16_t2 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_ushort3
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<3 x i32> @llvm.[[TARGET]].firstbituhigh.v3i16
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <3 x i32> splat (i32 15), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <3 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <3 x i1> %cmp.i.i, <3 x i32> splat (i32 -1), <3 x i32> [[SUB]]
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// CHECK-NEXT: ret <3 x i32>
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uint3 test_firstbithigh_ushort3(uint16_t3 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_ushort4
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<4 x i32> @llvm.[[TARGET]].firstbituhigh.v4i16
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <4 x i32> splat (i32 15), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <4 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <4 x i1> %cmp.i.i, <4 x i32> splat (i32 -1), <4 x i32> [[SUB]]
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// CHECK-NEXT: ret <4 x i32>
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uint4 test_firstbithigh_ushort4(uint16_t4 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_short
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// CHECK: [[FBH:%.*]] = tail call {{.*}}i32 @llvm.[[TARGET]].firstbitshigh.i16
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// DXCHECK-NEXT: [[SUB:%.*]] = sub i32 15, [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq i32 [[FBH]], -1
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// DXCHECK-NEXT: select i1 %cmp.i.i, i32 -1, i32 [[SUB]]
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// CHECK-NEXT: ret i32
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uint test_firstbithigh_short(int16_t p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_short2
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<2 x i32> @llvm.[[TARGET]].firstbitshigh.v2i16
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <2 x i32> splat (i32 15), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <2 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <2 x i1> %cmp.i.i, <2 x i32> splat (i32 -1), <2 x i32> [[SUB]]
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// CHECK-NEXT: ret <2 x i32>
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uint2 test_firstbithigh_short2(int16_t2 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_short3
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<3 x i32> @llvm.[[TARGET]].firstbitshigh.v3i16
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <3 x i32> splat (i32 15), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <3 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <3 x i1> %cmp.i.i, <3 x i32> splat (i32 -1), <3 x i32> [[SUB]]
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// CHECK-NEXT: ret <3 x i32>
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uint3 test_firstbithigh_short3(int16_t3 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_short4
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<4 x i32> @llvm.[[TARGET]].firstbitshigh.v4i16
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <4 x i32> splat (i32 15), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <4 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <4 x i1> %cmp.i.i, <4 x i32> splat (i32 -1), <4 x i32> [[SUB]]
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// CHECK-NEXT: ret <4 x i32>
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uint4 test_firstbithigh_short4(int16_t4 p0) {
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return firstbithigh(p0);
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}
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#endif // __HLSL_ENABLE_16_BIT
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// CHECK-LABEL: test_firstbithigh_uint
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// CHECK: [[FBH:%.*]] = tail call {{.*}}i32 @llvm.[[TARGET]].firstbituhigh.i32
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// DXCHECK-NEXT: [[SUB:%.*]] = sub i32 31, [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq i32 [[FBH]], -1
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// DXCHECK-NEXT: select i1 %cmp.i.i, i32 -1, i32 [[SUB]]
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// CHECK-NEXT: ret i32
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uint test_firstbithigh_uint(uint p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_uint2
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<2 x i32> @llvm.[[TARGET]].firstbituhigh.v2i32
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <2 x i32> splat (i32 31), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <2 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <2 x i1> %cmp.i.i, <2 x i32> splat (i32 -1), <2 x i32> [[SUB]]
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// CHECK-NEXT: ret <2 x i32>
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uint2 test_firstbithigh_uint2(uint2 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_uint3
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<3 x i32> @llvm.[[TARGET]].firstbituhigh.v3i32
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <3 x i32> splat (i32 31), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <3 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <3 x i1> %cmp.i.i, <3 x i32> splat (i32 -1), <3 x i32> [[SUB]]
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// CHECK-NEXT: ret <3 x i32>
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uint3 test_firstbithigh_uint3(uint3 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_uint4
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<4 x i32> @llvm.[[TARGET]].firstbituhigh.v4i32
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <4 x i32> splat (i32 31), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <4 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <4 x i1> %cmp.i.i, <4 x i32> splat (i32 -1), <4 x i32> [[SUB]]
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// CHECK-NEXT: ret <4 x i32>
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uint4 test_firstbithigh_uint4(uint4 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_ulong
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// CHECK: [[FBH:%.*]] = tail call {{.*}}i32 @llvm.[[TARGET]].firstbituhigh.i64
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// DXCHECK-NEXT: [[SUB:%.*]] = sub i32 63, [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq i32 [[FBH]], -1
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// DXCHECK-NEXT: select i1 %cmp.i.i, i32 -1, i32 [[SUB]]
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// CHECK-NEXT: ret i32
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uint test_firstbithigh_ulong(uint64_t p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_ulong2
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<2 x i32> @llvm.[[TARGET]].firstbituhigh.v2i64
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <2 x i32> splat (i32 63), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <2 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <2 x i1> %cmp.i.i, <2 x i32> splat (i32 -1), <2 x i32> [[SUB]]
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// CHECK-NEXT: ret <2 x i32>
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uint2 test_firstbithigh_ulong2(uint64_t2 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_ulong3
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<3 x i32> @llvm.[[TARGET]].firstbituhigh.v3i64
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <3 x i32> splat (i32 63), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <3 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <3 x i1> %cmp.i.i, <3 x i32> splat (i32 -1), <3 x i32> [[SUB]]
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// CHECK-NEXT: ret <3 x i32>
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uint3 test_firstbithigh_ulong3(uint64_t3 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_ulong4
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<4 x i32> @llvm.[[TARGET]].firstbituhigh.v4i64
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <4 x i32> splat (i32 63), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <4 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <4 x i1> %cmp.i.i, <4 x i32> splat (i32 -1), <4 x i32> [[SUB]]
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// CHECK-NEXT: ret <4 x i32>
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uint4 test_firstbithigh_ulong4(uint64_t4 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_int
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// CHECK: [[FBH:%.*]] = tail call {{.*}}i32 @llvm.[[TARGET]].firstbitshigh.i32
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// DXCHECK-NEXT: [[SUB:%.*]] = sub i32 31, [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq i32 [[FBH]], -1
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// DXCHECK-NEXT: select i1 %cmp.i.i, i32 -1, i32 [[SUB]]
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// CHECK-NEXT: ret i32
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uint test_firstbithigh_int(int p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_int2
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<2 x i32> @llvm.[[TARGET]].firstbitshigh.v2i32
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <2 x i32> splat (i32 31), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <2 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <2 x i1> %cmp.i.i, <2 x i32> splat (i32 -1), <2 x i32> [[SUB]]
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// CHECK-NEXT: ret <2 x i32>
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uint2 test_firstbithigh_int2(int2 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_int3
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<3 x i32> @llvm.[[TARGET]].firstbitshigh.v3i32
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <3 x i32> splat (i32 31), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <3 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <3 x i1> %cmp.i.i, <3 x i32> splat (i32 -1), <3 x i32> [[SUB]]
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// CHECK-NEXT: ret <3 x i32>
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uint3 test_firstbithigh_int3(int3 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_int4
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<4 x i32> @llvm.[[TARGET]].firstbitshigh.v4i32
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <4 x i32> splat (i32 31), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <4 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <4 x i1> %cmp.i.i, <4 x i32> splat (i32 -1), <4 x i32> [[SUB]]
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// CHECK-NEXT: ret <4 x i32>
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uint4 test_firstbithigh_int4(int4 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_long
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// CHECK: [[FBH:%.*]] = tail call {{.*}}i32 @llvm.[[TARGET]].firstbitshigh.i64
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// DXCHECK-NEXT: [[SUB:%.*]] = sub i32 63, [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq i32 [[FBH]], -1
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// DXCHECK-NEXT: select i1 %cmp.i.i, i32 -1, i32 [[SUB]]
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// CHECK-NEXT: ret i32
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uint test_firstbithigh_long(int64_t p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_long2
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<2 x i32> @llvm.[[TARGET]].firstbitshigh.v2i64
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <2 x i32> splat (i32 63), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <2 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <2 x i1> %cmp.i.i, <2 x i32> splat (i32 -1), <2 x i32> [[SUB]]
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// CHECK-NEXT: ret <2 x i32>
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uint2 test_firstbithigh_long2(int64_t2 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_long3
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<3 x i32> @llvm.[[TARGET]].firstbitshigh.v3i64
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <3 x i32> splat (i32 63), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <3 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <3 x i1> %cmp.i.i, <3 x i32> splat (i32 -1), <3 x i32> [[SUB]]
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// CHECK-NEXT: ret <3 x i32>
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uint3 test_firstbithigh_long3(int64_t3 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_long4
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<4 x i32> @llvm.[[TARGET]].firstbitshigh.v4i64
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <4 x i32> splat (i32 63), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <4 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <4 x i1> %cmp.i.i, <4 x i32> splat (i32 -1), <4 x i32> [[SUB]]
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// CHECK-NEXT: ret <4 x i32>
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uint4 test_firstbithigh_long4(int64_t4 p0) {
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return firstbithigh(p0);
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}
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// CHECK-LABEL: test_firstbithigh_upcast
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// CHECK: [[FBH:%.*]] = tail call {{.*}}<4 x i32> @llvm.[[TARGET]].firstbituhigh.v4i32(<4 x i32> %{{.*}})
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// DXCHECK-NEXT: [[SUB:%.*]] = sub <4 x i32> splat (i32 31), [[FBH]]
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// DXCHECK-NEXT: [[ICMP:%.*]] = icmp eq <4 x i32> [[FBH]], splat (i32 -1)
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// DXCHECK-NEXT: select <4 x i1> %cmp.i.i, <4 x i32> splat (i32 -1), <4 x i32> [[SUB]]
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// CHECK-NEXT: [[ZEXT:%.*]] = zext <4 x i32> {{.*}} to <4 x i64>
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// CHECK-NEXT: ret <4 x i64> [[ZEXT]]
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uint64_t4 test_firstbithigh_upcast(uint4 p0) {
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return firstbithigh(p0);
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}
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