derek.holloway
7502bf64a4
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239 lines
15 KiB
HLSL
239 lines
15 KiB
HLSL
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6
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// RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \
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// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
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// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s
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// CHECK-LABEL: define hidden void @_Z19OnesSwizzleToScalarRu11matrix_typeILm4ELm4EiEi(
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// CHECK-SAME: ptr noalias noundef nonnull align 4 dereferenceable(64) [[A:%.*]], i32 noundef [[I:%.*]]) #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: %[[#C_ENTRY:]] = call token @llvm.experimental.convergence.entry()
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
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// CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
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// CHECK-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I_ADDR]], align 4
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// CHECK-NEXT: [[CAST_SPLAT:%.*]] = insertelement <1 x i32> poison, i32 [[TMP0]], i64 0
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// CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x i32> [[CAST_SPLAT]], <1 x i32> poison, <4 x i32> zeroinitializer
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// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4:![0-9]+]], !align [[META5:![0-9]+]]
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// CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP1]], i32 0
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// CHECK-NEXT: store i32 [[TMP3]], ptr [[TMP2]], align 4
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// CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i32> [[TMP1]], i32 1
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// CHECK-NEXT: [[TMP5:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 4
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// CHECK-NEXT: store i32 [[TMP4]], ptr [[TMP5]], align 4
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// CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP1]], i32 2
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// CHECK-NEXT: [[TMP7:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 8
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// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP7]], align 4
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// CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i32> [[TMP1]], i32 3
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// CHECK-NEXT: [[TMP9:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 12
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// CHECK-NEXT: store i32 [[TMP8]], ptr [[TMP9]], align 4
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// CHECK-NEXT: ret void
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//
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void OnesSwizzleToScalar(out int4x4 A, int I) {
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A._11_12_13_14 = I.xxxx;
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}
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// CHECK-LABEL: define hidden void @_Z19OnesSwizzleToVectorRu11matrix_typeILm4ELm4EiEDv4_i(
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// CHECK-SAME: ptr noalias noundef nonnull align 4 dereferenceable(64) [[A:%.*]], <4 x i32> noundef [[V:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: %[[#C_ENTRY:]] = call token @llvm.experimental.convergence.entry()
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
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// CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x i32>, align 4
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// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
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// CHECK-NEXT: store <4 x i32> [[V]], ptr [[V_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[V_ADDR]], align 4
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// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]]
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// CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[TMP0]], i32 0
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// CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP1]], align 4
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// CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP0]], i32 1
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// CHECK-NEXT: [[TMP4:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 1
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// CHECK-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
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// CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[TMP0]], i32 2
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// CHECK-NEXT: [[TMP6:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 2
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// CHECK-NEXT: store i32 [[TMP5]], ptr [[TMP6]], align 4
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// CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i32> [[TMP0]], i32 3
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// CHECK-NEXT: [[TMP8:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 3
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// CHECK-NEXT: store i32 [[TMP7]], ptr [[TMP8]], align 4
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// CHECK-NEXT: ret void
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//
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void OnesSwizzleToVector(out int4x4 A, int4 V) {
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A._11_21_31_41 = V;
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}
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// CHECK-LABEL: define hidden void @_Z19TwosSwizzleToScalarRu11matrix_typeILm4ELm4EiEi(
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// CHECK-SAME: ptr noalias noundef nonnull align 4 dereferenceable(64) [[A:%.*]], i32 noundef [[I:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: %[[#C_ENTRY:]] = call token @llvm.experimental.convergence.entry()
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
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// CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
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// CHECK-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I_ADDR]], align 4
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// CHECK-NEXT: [[CAST_SPLAT:%.*]] = insertelement <1 x i32> poison, i32 [[TMP0]], i64 0
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// CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x i32> [[CAST_SPLAT]], <1 x i32> poison, <4 x i32> zeroinitializer
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// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]]
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// CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP1]], i32 0
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// CHECK-NEXT: [[TMP4:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 1
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// CHECK-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
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// CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[TMP1]], i32 1
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// CHECK-NEXT: [[TMP6:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 5
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// CHECK-NEXT: store i32 [[TMP5]], ptr [[TMP6]], align 4
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// CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i32> [[TMP1]], i32 2
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// CHECK-NEXT: [[TMP8:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 9
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// CHECK-NEXT: store i32 [[TMP7]], ptr [[TMP8]], align 4
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// CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP1]], i32 3
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// CHECK-NEXT: [[TMP10:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 13
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// CHECK-NEXT: store i32 [[TMP9]], ptr [[TMP10]], align 4
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// CHECK-NEXT: ret void
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//
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void TwosSwizzleToScalar(out int4x4 A, int I) {
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A._21_22_23_24 = I.xxxx;
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}
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// CHECK-LABEL: define hidden void @_Z19TwosSwizzleToVectorRu11matrix_typeILm4ELm4EiEDv4_i(
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// CHECK-SAME: ptr noalias noundef nonnull align 4 dereferenceable(64) [[A:%.*]], <4 x i32> noundef [[V:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: %[[#C_ENTRY:]] = call token @llvm.experimental.convergence.entry()
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
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// CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x i32>, align 4
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// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
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// CHECK-NEXT: store <4 x i32> [[V]], ptr [[V_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[V_ADDR]], align 4
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// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]]
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// CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[TMP0]], i32 0
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// CHECK-NEXT: [[TMP3:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 4
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// CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP3]], align 4
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// CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i32> [[TMP0]], i32 1
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// CHECK-NEXT: [[TMP5:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 5
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// CHECK-NEXT: store i32 [[TMP4]], ptr [[TMP5]], align 4
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// CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP0]], i32 2
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// CHECK-NEXT: [[TMP7:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 6
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// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP7]], align 4
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// CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i32> [[TMP0]], i32 3
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// CHECK-NEXT: [[TMP9:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 7
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// CHECK-NEXT: store i32 [[TMP8]], ptr [[TMP9]], align 4
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// CHECK-NEXT: ret void
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//
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void TwosSwizzleToVector(out int4x4 A, int4 V) {
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A._12_22_32_42 = V;
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}
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// CHECK-LABEL: define hidden void @_Z21ThreesSwizzleToScalarRu11matrix_typeILm4ELm4EiEi(
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// CHECK-SAME: ptr noalias noundef nonnull align 4 dereferenceable(64) [[A:%.*]], i32 noundef [[I:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: %[[#C_ENTRY:]] = call token @llvm.experimental.convergence.entry()
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
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// CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
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// CHECK-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I_ADDR]], align 4
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// CHECK-NEXT: [[CAST_SPLAT:%.*]] = insertelement <1 x i32> poison, i32 [[TMP0]], i64 0
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// CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x i32> [[CAST_SPLAT]], <1 x i32> poison, <4 x i32> zeroinitializer
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// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]]
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// CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP1]], i32 0
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// CHECK-NEXT: [[TMP4:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 2
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// CHECK-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
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// CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[TMP1]], i32 1
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// CHECK-NEXT: [[TMP6:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 6
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// CHECK-NEXT: store i32 [[TMP5]], ptr [[TMP6]], align 4
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// CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i32> [[TMP1]], i32 2
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// CHECK-NEXT: [[TMP8:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 10
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// CHECK-NEXT: store i32 [[TMP7]], ptr [[TMP8]], align 4
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// CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP1]], i32 3
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// CHECK-NEXT: [[TMP10:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 14
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// CHECK-NEXT: store i32 [[TMP9]], ptr [[TMP10]], align 4
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// CHECK-NEXT: ret void
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//
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void ThreesSwizzleToScalar(out int4x4 A, int I) {
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A._31_32_33_34 = I.xxxx;
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}
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// CHECK-LABEL: define hidden void @_Z21ThreesSwizzleToVectorRu11matrix_typeILm4ELm4EiEDv4_i(
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// CHECK-SAME: ptr noalias noundef nonnull align 4 dereferenceable(64) [[A:%.*]], <4 x i32> noundef [[V:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: %[[#C_ENTRY:]] = call token @llvm.experimental.convergence.entry()
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
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// CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x i32>, align 4
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// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
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// CHECK-NEXT: store <4 x i32> [[V]], ptr [[V_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[V_ADDR]], align 4
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// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]]
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// CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[TMP0]], i32 0
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// CHECK-NEXT: [[TMP3:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 8
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// CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP3]], align 4
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// CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i32> [[TMP0]], i32 1
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// CHECK-NEXT: [[TMP5:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 9
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// CHECK-NEXT: store i32 [[TMP4]], ptr [[TMP5]], align 4
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// CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP0]], i32 2
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// CHECK-NEXT: [[TMP7:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 10
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// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP7]], align 4
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// CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i32> [[TMP0]], i32 3
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// CHECK-NEXT: [[TMP9:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 11
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// CHECK-NEXT: store i32 [[TMP8]], ptr [[TMP9]], align 4
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// CHECK-NEXT: ret void
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//
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void ThreesSwizzleToVector(out int4x4 A, int4 V) {
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A._13_23_33_43 = V;
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}
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// CHECK-LABEL: define hidden void @_Z20FoursSwizzleToScalarRu11matrix_typeILm4ELm4EiEi(
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// CHECK-SAME: ptr noalias noundef nonnull align 4 dereferenceable(64) [[A:%.*]], i32 noundef [[I:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: %[[#C_ENTRY:]] = call token @llvm.experimental.convergence.entry()
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
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// CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
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// CHECK-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I_ADDR]], align 4
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// CHECK-NEXT: [[CAST_SPLAT:%.*]] = insertelement <1 x i32> poison, i32 [[TMP0]], i64 0
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// CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x i32> [[CAST_SPLAT]], <1 x i32> poison, <4 x i32> zeroinitializer
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// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]]
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// CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP1]], i32 0
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// CHECK-NEXT: [[TMP4:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 3
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// CHECK-NEXT: store i32 [[TMP3]], ptr [[TMP4]], align 4
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// CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[TMP1]], i32 1
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// CHECK-NEXT: [[TMP6:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 7
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// CHECK-NEXT: store i32 [[TMP5]], ptr [[TMP6]], align 4
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// CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i32> [[TMP1]], i32 2
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// CHECK-NEXT: [[TMP8:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 11
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// CHECK-NEXT: store i32 [[TMP7]], ptr [[TMP8]], align 4
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// CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP1]], i32 3
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// CHECK-NEXT: [[TMP10:%.*]] = getelementptr <16 x i32>, ptr [[TMP2]], i32 0, i32 15
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// CHECK-NEXT: store i32 [[TMP9]], ptr [[TMP10]], align 4
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// CHECK-NEXT: ret void
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//
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void FoursSwizzleToScalar(out int4x4 A, int I) {
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A._41_42_43_44 = I.xxxx;
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}
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// CHECK-LABEL: define hidden void @_Z20FoursSwizzleToVectorRu11matrix_typeILm4ELm4EiEDv4_i(
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// CHECK-SAME: ptr noalias noundef nonnull align 4 dereferenceable(64) [[A:%.*]], <4 x i32> noundef [[V:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: %[[#C_ENTRY:]] = call token @llvm.experimental.convergence.entry()
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
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// CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x i32>, align 4
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// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
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// CHECK-NEXT: store <4 x i32> [[V]], ptr [[V_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[V_ADDR]], align 4
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// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]]
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// CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[TMP0]], i32 0
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// CHECK-NEXT: [[TMP3:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 3
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// CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP3]], align 4
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// CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i32> [[TMP0]], i32 1
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// CHECK-NEXT: [[TMP5:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 7
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// CHECK-NEXT: store i32 [[TMP4]], ptr [[TMP5]], align 4
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// CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP0]], i32 2
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// CHECK-NEXT: [[TMP7:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 11
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// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP7]], align 4
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// CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i32> [[TMP0]], i32 3
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// CHECK-NEXT: [[TMP9:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 15
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// CHECK-NEXT: store i32 [[TMP8]], ptr [[TMP9]], align 4
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// CHECK-NEXT: ret void
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//
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void FoursSwizzleToVector(out int4x4 A, int4 V) {
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A._41_42_43_44 = V;
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}
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//.
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// CHECK: [[META4]] = !{}
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// CHECK: [[META5]] = !{i64 4}
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//.
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