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26 lines
2.5 KiB
C
26 lines
2.5 KiB
C
// REQUIRES: aarch64-registered-target
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// RUN: %clang --target=aarch64 --print-enabled-extensions -mcpu=neoverse-e1 | FileCheck --strict-whitespace --implicit-check-not=FEAT_ %s
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// CHECK: Extensions enabled for the given AArch64 target
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// CHECK-EMPTY:
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// CHECK-NEXT: Architecture Feature(s) Description
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// CHECK-NEXT: FEAT_AES, FEAT_PMULL Enable AES support
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// CHECK-NEXT: FEAT_AdvSIMD Enable Advanced SIMD instructions
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// CHECK-NEXT: FEAT_CRC32 Enable Armv8.0-A CRC-32 checksum instructions
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// CHECK-NEXT: FEAT_DPB Enable Armv8.2-A data Cache Clean to Point of Persistence
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// CHECK-NEXT: FEAT_DotProd Enable dot product support
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// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
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// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
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// CHECK-NEXT: FEAT_LOR Enable Armv8.1-A Limited Ordering Regions extension
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// CHECK-NEXT: FEAT_LRCPC Enable support for RCPC extension
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// CHECK-NEXT: FEAT_LSE Enable Armv8.1-A Large System Extension (LSE) atomic instructions
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// CHECK-NEXT: FEAT_PAN Enable Armv8.1-A Privileged Access-Never extension
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// CHECK-NEXT: FEAT_PAN2 Enable Armv8.2-A PAN s1e1R and s1e1W Variants
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// CHECK-NEXT: FEAT_PMUv3 Enable Armv8.0-A PMUv3 Performance Monitors extension
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// CHECK-NEXT: FEAT_RAS, FEAT_RASv1p1 Enable Armv8.0-A Reliability, Availability and Serviceability Extensions
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// CHECK-NEXT: FEAT_RDM Enable Armv8.1-A Rounding Double Multiply Add/Subtract instructions
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// CHECK-NEXT: FEAT_SHA1, FEAT_SHA256 Enable SHA1 and SHA256 support
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// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
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// CHECK-NEXT: FEAT_UAO Enable Armv8.2-A UAO PState
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// CHECK-NEXT: FEAT_VHE Enable Armv8.1-A Virtual Host extension
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