derek.holloway
7502bf64a4
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1375 lines
99 KiB
C++
1375 lines
99 KiB
C++
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
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// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fopenmp-targets=amdgcn-amd-amdhsa -fopenmp-target-ignore-env-vars -fopenmp-assume-no-nested-parallelism -fopenmp-assume-no-thread-state -emit-llvm-bc %s -o %t-ppc-host.bc
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// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple amdgcn-amd-amdhsa -fopenmp-targets=amdgcn-amd-amdhsa -fopenmp-target-ignore-env-vars -fopenmp-assume-no-nested-parallelism -fopenmp-assume-no-thread-state -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s
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// expected-no-diagnostics
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int main()
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{
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int N = 10;
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int a[N];
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int b[N];
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int c[N];
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int i;
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for (i=0; i<N; i++)
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b[i]=i;
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for (i=0; i<N; i++) {
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a[i] = 0;
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c[i] = 0;
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}
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#pragma omp target teams thread_limit(64)
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#pragma omp distribute parallel for
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{
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for (int k = 0; k< N; k++) {
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a[k]=b[k];
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}
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}
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#pragma omp target teams thread_limit(100)
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#pragma omp distribute parallel for
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{
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for (int k = 0; k< N; k++) {
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a[k]=b[k];
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}
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}
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#pragma omp target
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#pragma omp teams
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#pragma omp distribute parallel for num_threads(256)
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for (int k = 0; k< N; k++) {
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c[k]=b[k];
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}
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#pragma omp target
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#pragma omp teams
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#pragma omp distribute parallel for num_threads(1024)
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for (int k = 0; k< N; k++) {
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c[k]=b[k];
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}
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#pragma omp target
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#pragma omp teams
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#pragma omp distribute parallel for num_threads(900)
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for (int k = 0; k< N; k++) {
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c[k]=b[k];
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}
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#pragma omp target
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#pragma omp teams
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{
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#pragma omp distribute parallel for
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for (int k = 0; k< N; k++)
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a[k]=b[k];
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#pragma omp distribute parallel for
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for (int k = 0; k< N; k+=2)
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c[k]=b[k];
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}
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#pragma omp target
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#pragma omp teams distribute parallel for thread_limit(512) num_threads(128)
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for (int k = 0; k< N; k++)
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a[k]=b[k];
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#pragma omp target
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{
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#pragma omp teams distribute parallel for thread_limit(64) num_threads(512)
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for (int k = 0; k< N; k++)
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a[k]=b[k];
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}
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#pragma omp target
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#pragma omp teams distribute parallel for
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for (int k = 0; k< N/2; k+=2)
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a[k]=b[k];
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}
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// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l24
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// CHECK-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
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// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
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// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8, addrspace(5)
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
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// CHECK-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
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// CHECK-NEXT: [[K:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[N_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[N_ADDR]] to ptr
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// CHECK-NEXT: [[VLA_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR]] to ptr
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// CHECK-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[A_ADDR]] to ptr
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// CHECK-NEXT: [[VLA_ADDR2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR2]] to ptr
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// CHECK-NEXT: [[B_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B_ADDR]] to ptr
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// CHECK-NEXT: [[DYN_PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DYN_PTR_ADDR]] to ptr
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// CHECK-NEXT: [[K_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K]] to ptr
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// CHECK-NEXT: [[DOTCAPTURE_EXPR__ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_]] to ptr
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// CHECK-NEXT: [[DOTCAPTURE_EXPR_3_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_3]] to ptr
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// CHECK-NEXT: [[DOTOMP_LB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_LB]] to ptr
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// CHECK-NEXT: [[DOTOMP_UB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_UB]] to ptr
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// CHECK-NEXT: [[DOTOMP_IV_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IV]] to ptr
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// CHECK-NEXT: store i64 [[N]], ptr [[N_ADDR_ASCAST]], align 8
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// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR_ASCAST]], align 8
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// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR_ASCAST]], align 8
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// CHECK-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2_ASCAST]], align 8
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// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR_ASCAST]], align 8
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// CHECK-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR_ASCAST]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR_ASCAST]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR_ASCAST]], align 8, !nonnull [[META13:![0-9]+]], !align [[META14:![0-9]+]]
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// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR2_ASCAST]], align 8
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// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
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// CHECK-NEXT: call void @__kmpc_specialized_kernel_init()
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// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR_ASCAST]], align 4
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// CHECK-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
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// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
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// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
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// CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
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// CHECK-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
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// CHECK-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
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// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB_ASCAST]], align 4
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// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
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// CHECK-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB_ASCAST]], align 4
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// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB_ASCAST]], align 4
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// CHECK-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
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// CHECK-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
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// CHECK-NEXT: [[GPU_BLOCK_ID:%.*]] = call i32 @llvm.amdgcn.workgroup.id.x()
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// CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[GPU_BLOCK_ID]], [[NVPTX_NUM_THREADS]]
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// CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP8]]
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// CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP10]], 1
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// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP11]], [[TMP12]]
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// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
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// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
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// CHECK-NEXT: store i32 [[ADD]], ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB_ASCAST]], align 4
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// CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
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// CHECK-NEXT: br i1 [[CMP]], label [[OMP_KERNEL_BODY:%.*]], label [[OMP_KERNEL_DONE:%.*]]
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// CHECK: omp.kernel.body:
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// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
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// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]]
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// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
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// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i64
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// CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM5]]
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// CHECK-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4
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// CHECK-NEXT: br label [[OMP_KERNEL_DONE]]
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// CHECK: omp.kernel.done:
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// CHECK-NEXT: ret void
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//
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//
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// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l32
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// CHECK-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR3:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
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// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
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// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
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// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8, addrspace(5)
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// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
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// CHECK-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
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// CHECK-NEXT: [[K:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[N_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[N_ADDR]] to ptr
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// CHECK-NEXT: [[VLA_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR]] to ptr
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// CHECK-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[A_ADDR]] to ptr
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// CHECK-NEXT: [[VLA_ADDR2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR2]] to ptr
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// CHECK-NEXT: [[B_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B_ADDR]] to ptr
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// CHECK-NEXT: [[DYN_PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DYN_PTR_ADDR]] to ptr
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// CHECK-NEXT: [[K_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K]] to ptr
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// CHECK-NEXT: [[DOTCAPTURE_EXPR__ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_]] to ptr
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// CHECK-NEXT: [[DOTCAPTURE_EXPR_3_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_3]] to ptr
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// CHECK-NEXT: [[DOTOMP_LB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_LB]] to ptr
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// CHECK-NEXT: [[DOTOMP_UB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_UB]] to ptr
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// CHECK-NEXT: [[DOTOMP_IV_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IV]] to ptr
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// CHECK-NEXT: store i64 [[N]], ptr [[N_ADDR_ASCAST]], align 8
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// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR_ASCAST]], align 8
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// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR_ASCAST]], align 8
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// CHECK-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2_ASCAST]], align 8
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// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR_ASCAST]], align 8
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// CHECK-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR_ASCAST]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR_ASCAST]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
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// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR2_ASCAST]], align 8
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// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
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// CHECK-NEXT: call void @__kmpc_specialized_kernel_init()
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// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR_ASCAST]], align 4
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// CHECK-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
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// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
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// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
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// CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
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// CHECK-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
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// CHECK-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
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// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB_ASCAST]], align 4
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// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
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// CHECK-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB_ASCAST]], align 4
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// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB_ASCAST]], align 4
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// CHECK-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
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// CHECK-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
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// CHECK-NEXT: [[GPU_BLOCK_ID:%.*]] = call i32 @llvm.amdgcn.workgroup.id.x()
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// CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[GPU_BLOCK_ID]], [[NVPTX_NUM_THREADS]]
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// CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP8]]
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// CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP10]], 1
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// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP11]], [[TMP12]]
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// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
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// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
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// CHECK-NEXT: store i32 [[ADD]], ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB_ASCAST]], align 4
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// CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
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// CHECK-NEXT: br i1 [[CMP]], label [[OMP_KERNEL_BODY:%.*]], label [[OMP_KERNEL_DONE:%.*]]
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// CHECK: omp.kernel.body:
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// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
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// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]]
|
|
// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
|
// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM5]]
|
|
// CHECK-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4
|
|
// CHECK-NEXT: br label [[OMP_KERNEL_DONE]]
|
|
// CHECK: omp.kernel.done:
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l40
|
|
// CHECK-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR4:[0-9]+]] {
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[K:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[N_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[N_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR]] to ptr
|
|
// CHECK-NEXT: [[C_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[C_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR2]] to ptr
|
|
// CHECK-NEXT: [[B_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B_ADDR]] to ptr
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DYN_PTR_ADDR]] to ptr
|
|
// CHECK-NEXT: [[K_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR__ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_3]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_LB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_LB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_UB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_UB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IV_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IV]] to ptr
|
|
// CHECK-NEXT: store i64 [[N]], ptr [[N_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[C]], ptr [[C_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: call void @__kmpc_specialized_kernel_init()
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
|
|
// CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
|
|
// CHECK-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
|
|
// CHECK-NEXT: [[GPU_BLOCK_ID:%.*]] = call i32 @llvm.amdgcn.workgroup.id.x()
|
|
// CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[GPU_BLOCK_ID]], [[NVPTX_NUM_THREADS]]
|
|
// CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP8]]
|
|
// CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP10]], 1
|
|
// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP11]], [[TMP12]]
|
|
// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
|
|
// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK-NEXT: store i32 [[ADD]], ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
|
|
// CHECK-NEXT: br i1 [[CMP]], label [[OMP_KERNEL_BODY:%.*]], label [[OMP_KERNEL_DONE:%.*]]
|
|
// CHECK: omp.kernel.body:
|
|
// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]]
|
|
// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
|
// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM5]]
|
|
// CHECK-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4
|
|
// CHECK-NEXT: br label [[OMP_KERNEL_DONE]]
|
|
// CHECK: omp.kernel.done:
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l47
|
|
// CHECK-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR4]] {
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[K:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[N_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[N_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR]] to ptr
|
|
// CHECK-NEXT: [[C_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[C_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR2]] to ptr
|
|
// CHECK-NEXT: [[B_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B_ADDR]] to ptr
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DYN_PTR_ADDR]] to ptr
|
|
// CHECK-NEXT: [[K_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR__ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_3]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_LB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_LB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_UB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_UB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IV_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IV]] to ptr
|
|
// CHECK-NEXT: store i64 [[N]], ptr [[N_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[C]], ptr [[C_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: call void @__kmpc_specialized_kernel_init()
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
|
|
// CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
|
|
// CHECK-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
|
|
// CHECK-NEXT: [[GPU_BLOCK_ID:%.*]] = call i32 @llvm.amdgcn.workgroup.id.x()
|
|
// CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[GPU_BLOCK_ID]], [[NVPTX_NUM_THREADS]]
|
|
// CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP8]]
|
|
// CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP10]], 1
|
|
// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP11]], [[TMP12]]
|
|
// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
|
|
// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK-NEXT: store i32 [[ADD]], ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
|
|
// CHECK-NEXT: br i1 [[CMP]], label [[OMP_KERNEL_BODY:%.*]], label [[OMP_KERNEL_DONE:%.*]]
|
|
// CHECK: omp.kernel.body:
|
|
// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]]
|
|
// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
|
// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM5]]
|
|
// CHECK-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4
|
|
// CHECK-NEXT: br label [[OMP_KERNEL_DONE]]
|
|
// CHECK: omp.kernel.done:
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l54
|
|
// CHECK-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR4]] {
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[K:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[N_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[N_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR]] to ptr
|
|
// CHECK-NEXT: [[C_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[C_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR2]] to ptr
|
|
// CHECK-NEXT: [[B_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B_ADDR]] to ptr
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DYN_PTR_ADDR]] to ptr
|
|
// CHECK-NEXT: [[K_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR__ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_3]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_LB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_LB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_UB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_UB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IV_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IV]] to ptr
|
|
// CHECK-NEXT: store i64 [[N]], ptr [[N_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[C]], ptr [[C_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: call void @__kmpc_specialized_kernel_init()
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
|
|
// CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
|
|
// CHECK-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
|
|
// CHECK-NEXT: [[GPU_BLOCK_ID:%.*]] = call i32 @llvm.amdgcn.workgroup.id.x()
|
|
// CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[GPU_BLOCK_ID]], [[NVPTX_NUM_THREADS]]
|
|
// CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP8]]
|
|
// CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP10]], 1
|
|
// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP11]], [[TMP12]]
|
|
// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
|
|
// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK-NEXT: store i32 [[ADD]], ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
|
|
// CHECK-NEXT: br i1 [[CMP]], label [[OMP_KERNEL_BODY:%.*]], label [[OMP_KERNEL_DONE:%.*]]
|
|
// CHECK: omp.kernel.body:
|
|
// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]]
|
|
// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
|
// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM5]]
|
|
// CHECK-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4
|
|
// CHECK-NEXT: br label [[OMP_KERNEL_DONE]]
|
|
// CHECK: omp.kernel.done:
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61
|
|
// CHECK-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i64 noundef [[VLA3:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR5:[0-9]+]] {
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[N_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[N_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR]] to ptr
|
|
// CHECK-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[A_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR2]] to ptr
|
|
// CHECK-NEXT: [[B_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR4_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR4]] to ptr
|
|
// CHECK-NEXT: [[C_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[C_ADDR]] to ptr
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DYN_PTR_ADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTZERO_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTZERO_ADDR]] to ptr
|
|
// CHECK-NEXT: store i64 [[N]], ptr [[N_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA3]], ptr [[VLA_ADDR4_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[C]], ptr [[C_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[VLA_ADDR4_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[C_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_target_init(ptr addrspacecast (ptr addrspace(1) @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_kernel_environment to ptr), ptr [[DYN_PTR]])
|
|
// CHECK-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP6]], -1
|
|
// CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
|
|
// CHECK: user_code.entry:
|
|
// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[N_ADDR_ASCAST]], align 4
|
|
// CHECK-NEXT: [[N5:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i64 4)
|
|
// CHECK-NEXT: store i32 [[TMP7]], ptr [[N5]], align 4
|
|
// CHECK-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_global_thread_num(ptr addrspacecast (ptr addrspace(1) @[[GLOB1:[0-9]+]] to ptr))
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTZERO_ADDR_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP8]], ptr addrspace(5) [[DOTTHREADID_TEMP_]], align 4
|
|
// CHECK-NEXT: [[TMP9:%.*]] = addrspacecast ptr addrspace(5) [[DOTTHREADID_TEMP_]] to ptr
|
|
// CHECK-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_omp_outlined(ptr [[TMP9]], ptr [[DOTZERO_ADDR_ASCAST]], ptr [[N5]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP2]], ptr [[TMP3]], i64 [[TMP4]], ptr [[TMP5]]) #[[ATTR1:[0-9]+]]
|
|
// CHECK-NEXT: call void @__kmpc_free_shared(ptr [[N5]], i64 4)
|
|
// CHECK-NEXT: call void @__kmpc_target_deinit()
|
|
// CHECK-NEXT: ret void
|
|
// CHECK: worker.exit:
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_omp_outlined
|
|
// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i64 noundef [[VLA3:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR7:[0-9]+]] {
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR4:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[K:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[K7:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [7 x ptr], align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IV10:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[_TMP11:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[K17:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_COMB_LB20:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_COMB_UB21:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_STRIDE22:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IS_LAST23:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[K24:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[CAPTURED_VARS_ADDRS34:%.*]] = alloca [7 x ptr], align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTGLOBAL_TID__ADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTBOUND_TID__ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTBOUND_TID__ADDR]] to ptr
|
|
// CHECK-NEXT: [[N_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[N_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR]] to ptr
|
|
// CHECK-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[A_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR2]] to ptr
|
|
// CHECK-NEXT: [[B_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR4_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR4]] to ptr
|
|
// CHECK-NEXT: [[C_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[C_ADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IV_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IV]] to ptr
|
|
// CHECK-NEXT: [[TMP_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[TMP]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR__ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_5_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_5]] to ptr
|
|
// CHECK-NEXT: [[K_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_COMB_LB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_COMB_LB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_COMB_UB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_COMB_UB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_STRIDE_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_STRIDE]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IS_LAST_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IS_LAST]] to ptr
|
|
// CHECK-NEXT: [[K7_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K7]] to ptr
|
|
// CHECK-NEXT: [[CAPTURED_VARS_ADDRS_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[CAPTURED_VARS_ADDRS]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IV10_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IV10]] to ptr
|
|
// CHECK-NEXT: [[TMP11_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[_TMP11]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_12_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_12]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_13_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_13]] to ptr
|
|
// CHECK-NEXT: [[K17_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K17]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_COMB_LB20_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_COMB_LB20]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_COMB_UB21_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_COMB_UB21]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_STRIDE22_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_STRIDE22]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IS_LAST23_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IS_LAST23]] to ptr
|
|
// CHECK-NEXT: [[K24_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K24]] to ptr
|
|
// CHECK-NEXT: [[CAPTURED_VARS_ADDRS34_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[CAPTURED_VARS_ADDRS34]] to ptr
|
|
// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[N]], ptr [[N_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA3]], ptr [[VLA_ADDR4_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[C]], ptr [[C_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[B_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[VLA_ADDR4_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP6:%.*]] = load ptr, ptr [[C_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP0]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP7]], ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP8]], 0
|
|
// CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK-NEXT: [[SUB6:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK-NEXT: store i32 [[SUB6]], ptr [[DOTCAPTURE_EXPR_5_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
|
|
// CHECK-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
|
|
// CHECK: omp.precond.then:
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_5_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_COMB_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
|
|
// CHECK-NEXT: call void @__kmpc_distribute_static_init_4(ptr addrspacecast (ptr addrspace(1) @[[GLOB2:[0-9]+]] to ptr), i32 [[TMP12]], i32 92, ptr [[DOTOMP_IS_LAST_ASCAST]], ptr [[DOTOMP_COMB_LB_ASCAST]], ptr [[DOTOMP_COMB_UB_ASCAST]], ptr [[DOTOMP_STRIDE_ASCAST]], i32 1, i32 1)
|
|
// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_5_ASCAST]], align 4
|
|
// CHECK-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
|
|
// CHECK-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
|
|
// CHECK: cond.true:
|
|
// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_5_ASCAST]], align 4
|
|
// CHECK-NEXT: br label [[COND_END:%.*]]
|
|
// CHECK: cond.false:
|
|
// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: br label [[COND_END]]
|
|
// CHECK: cond.end:
|
|
// CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
|
|
// CHECK-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
|
// CHECK: omp.inner.for.cond:
|
|
// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
|
|
// CHECK-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
|
// CHECK: omp.inner.for.body:
|
|
// CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP21:%.*]] = zext i32 [[TMP20]] to i64
|
|
// CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
|
|
// CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS_ASCAST]], i64 0, i64 0
|
|
// CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP21]] to ptr
|
|
// CHECK-NEXT: store ptr [[TMP25]], ptr [[TMP24]], align 8
|
|
// CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS_ASCAST]], i64 0, i64 1
|
|
// CHECK-NEXT: [[TMP27:%.*]] = inttoptr i64 [[TMP23]] to ptr
|
|
// CHECK-NEXT: store ptr [[TMP27]], ptr [[TMP26]], align 8
|
|
// CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS_ASCAST]], i64 0, i64 2
|
|
// CHECK-NEXT: store ptr [[TMP0]], ptr [[TMP28]], align 8
|
|
// CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS_ASCAST]], i64 0, i64 3
|
|
// CHECK-NEXT: [[TMP30:%.*]] = inttoptr i64 [[TMP1]] to ptr
|
|
// CHECK-NEXT: store ptr [[TMP30]], ptr [[TMP29]], align 8
|
|
// CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS_ASCAST]], i64 0, i64 4
|
|
// CHECK-NEXT: store ptr [[TMP2]], ptr [[TMP31]], align 8
|
|
// CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS_ASCAST]], i64 0, i64 5
|
|
// CHECK-NEXT: [[TMP33:%.*]] = inttoptr i64 [[TMP3]] to ptr
|
|
// CHECK-NEXT: store ptr [[TMP33]], ptr [[TMP32]], align 8
|
|
// CHECK-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS_ASCAST]], i64 0, i64 6
|
|
// CHECK-NEXT: store ptr [[TMP4]], ptr [[TMP34]], align 8
|
|
// CHECK-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP35]], align 4
|
|
// CHECK-NEXT: call void @__kmpc_parallel_60(ptr addrspacecast (ptr addrspace(1) @[[GLOB1]] to ptr), i32 [[TMP36]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_omp_outlined_omp_outlined, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_omp_outlined_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS_ASCAST]], i64 7, i32 0)
|
|
// CHECK-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
|
// CHECK: omp.inner.for.inc:
|
|
// CHECK-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_STRIDE_ASCAST]], align 4
|
|
// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
|
|
// CHECK-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
// CHECK: omp.inner.for.end:
|
|
// CHECK-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
|
|
// CHECK: omp.loop.exit:
|
|
// CHECK-NEXT: [[TMP39:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP40:%.*]] = load i32, ptr [[TMP39]], align 4
|
|
// CHECK-NEXT: call void @__kmpc_distribute_static_fini(ptr addrspacecast (ptr addrspace(1) @[[GLOB2]] to ptr), i32 [[TMP40]])
|
|
// CHECK-NEXT: br label [[OMP_PRECOND_END]]
|
|
// CHECK: omp.precond.end:
|
|
// CHECK-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP0]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR_12_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12_ASCAST]], align 4
|
|
// CHECK-NEXT: [[SUB14:%.*]] = sub i32 [[TMP42]], -1
|
|
// CHECK-NEXT: [[DIV15:%.*]] = udiv i32 [[SUB14]], 2
|
|
// CHECK-NEXT: [[SUB16:%.*]] = sub i32 [[DIV15]], 1
|
|
// CHECK-NEXT: store i32 [[SUB16]], ptr [[DOTCAPTURE_EXPR_13_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[K17_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12_ASCAST]], align 4
|
|
// CHECK-NEXT: [[CMP18:%.*]] = icmp slt i32 0, [[TMP43]]
|
|
// CHECK-NEXT: br i1 [[CMP18]], label [[OMP_PRECOND_THEN19:%.*]], label [[OMP_PRECOND_END39:%.*]]
|
|
// CHECK: omp.precond.then19:
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB20_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP44]], ptr [[DOTOMP_COMB_UB21_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE22_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST23_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP45:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP46:%.*]] = load i32, ptr [[TMP45]], align 4
|
|
// CHECK-NEXT: call void @__kmpc_distribute_static_init_4u(ptr addrspacecast (ptr addrspace(1) @[[GLOB2]] to ptr), i32 [[TMP46]], i32 92, ptr [[DOTOMP_IS_LAST23_ASCAST]], ptr [[DOTOMP_COMB_LB20_ASCAST]], ptr [[DOTOMP_COMB_UB21_ASCAST]], ptr [[DOTOMP_STRIDE22_ASCAST]], i32 1, i32 1)
|
|
// CHECK-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTOMP_COMB_UB21_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP48:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13_ASCAST]], align 4
|
|
// CHECK-NEXT: [[CMP25:%.*]] = icmp ugt i32 [[TMP47]], [[TMP48]]
|
|
// CHECK-NEXT: br i1 [[CMP25]], label [[COND_TRUE26:%.*]], label [[COND_FALSE27:%.*]]
|
|
// CHECK: cond.true26:
|
|
// CHECK-NEXT: [[TMP49:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13_ASCAST]], align 4
|
|
// CHECK-NEXT: br label [[COND_END28:%.*]]
|
|
// CHECK: cond.false27:
|
|
// CHECK-NEXT: [[TMP50:%.*]] = load i32, ptr [[DOTOMP_COMB_UB21_ASCAST]], align 4
|
|
// CHECK-NEXT: br label [[COND_END28]]
|
|
// CHECK: cond.end28:
|
|
// CHECK-NEXT: [[COND29:%.*]] = phi i32 [ [[TMP49]], [[COND_TRUE26]] ], [ [[TMP50]], [[COND_FALSE27]] ]
|
|
// CHECK-NEXT: store i32 [[COND29]], ptr [[DOTOMP_COMB_UB21_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP51:%.*]] = load i32, ptr [[DOTOMP_COMB_LB20_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP51]], ptr [[DOTOMP_IV10_ASCAST]], align 4
|
|
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND30:%.*]]
|
|
// CHECK: omp.inner.for.cond30:
|
|
// CHECK-NEXT: [[TMP52:%.*]] = load i32, ptr [[DOTOMP_IV10_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP53:%.*]] = load i32, ptr [[DOTOMP_COMB_UB21_ASCAST]], align 4
|
|
// CHECK-NEXT: [[ADD31:%.*]] = add i32 [[TMP53]], 1
|
|
// CHECK-NEXT: [[CMP32:%.*]] = icmp ult i32 [[TMP52]], [[ADD31]]
|
|
// CHECK-NEXT: br i1 [[CMP32]], label [[OMP_INNER_FOR_BODY33:%.*]], label [[OMP_INNER_FOR_END37:%.*]]
|
|
// CHECK: omp.inner.for.body33:
|
|
// CHECK-NEXT: [[TMP54:%.*]] = load i32, ptr [[DOTOMP_COMB_LB20_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP55:%.*]] = zext i32 [[TMP54]] to i64
|
|
// CHECK-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTOMP_COMB_UB21_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP57:%.*]] = zext i32 [[TMP56]] to i64
|
|
// CHECK-NEXT: [[TMP58:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS34_ASCAST]], i64 0, i64 0
|
|
// CHECK-NEXT: [[TMP59:%.*]] = inttoptr i64 [[TMP55]] to ptr
|
|
// CHECK-NEXT: store ptr [[TMP59]], ptr [[TMP58]], align 8
|
|
// CHECK-NEXT: [[TMP60:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS34_ASCAST]], i64 0, i64 1
|
|
// CHECK-NEXT: [[TMP61:%.*]] = inttoptr i64 [[TMP57]] to ptr
|
|
// CHECK-NEXT: store ptr [[TMP61]], ptr [[TMP60]], align 8
|
|
// CHECK-NEXT: [[TMP62:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS34_ASCAST]], i64 0, i64 2
|
|
// CHECK-NEXT: store ptr [[TMP0]], ptr [[TMP62]], align 8
|
|
// CHECK-NEXT: [[TMP63:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS34_ASCAST]], i64 0, i64 3
|
|
// CHECK-NEXT: [[TMP64:%.*]] = inttoptr i64 [[TMP5]] to ptr
|
|
// CHECK-NEXT: store ptr [[TMP64]], ptr [[TMP63]], align 8
|
|
// CHECK-NEXT: [[TMP65:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS34_ASCAST]], i64 0, i64 4
|
|
// CHECK-NEXT: store ptr [[TMP6]], ptr [[TMP65]], align 8
|
|
// CHECK-NEXT: [[TMP66:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS34_ASCAST]], i64 0, i64 5
|
|
// CHECK-NEXT: [[TMP67:%.*]] = inttoptr i64 [[TMP3]] to ptr
|
|
// CHECK-NEXT: store ptr [[TMP67]], ptr [[TMP66]], align 8
|
|
// CHECK-NEXT: [[TMP68:%.*]] = getelementptr inbounds [7 x ptr], ptr [[CAPTURED_VARS_ADDRS34_ASCAST]], i64 0, i64 6
|
|
// CHECK-NEXT: store ptr [[TMP4]], ptr [[TMP68]], align 8
|
|
// CHECK-NEXT: [[TMP69:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP70:%.*]] = load i32, ptr [[TMP69]], align 4
|
|
// CHECK-NEXT: call void @__kmpc_parallel_60(ptr addrspacecast (ptr addrspace(1) @[[GLOB1]] to ptr), i32 [[TMP70]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_omp_outlined_omp_outlined.1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_omp_outlined_omp_outlined.1_wrapper, ptr [[CAPTURED_VARS_ADDRS34_ASCAST]], i64 7, i32 0)
|
|
// CHECK-NEXT: br label [[OMP_INNER_FOR_INC35:%.*]]
|
|
// CHECK: omp.inner.for.inc35:
|
|
// CHECK-NEXT: [[TMP71:%.*]] = load i32, ptr [[DOTOMP_IV10_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP72:%.*]] = load i32, ptr [[DOTOMP_STRIDE22_ASCAST]], align 4
|
|
// CHECK-NEXT: [[ADD36:%.*]] = add i32 [[TMP71]], [[TMP72]]
|
|
// CHECK-NEXT: store i32 [[ADD36]], ptr [[DOTOMP_IV10_ASCAST]], align 4
|
|
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND30]]
|
|
// CHECK: omp.inner.for.end37:
|
|
// CHECK-NEXT: br label [[OMP_LOOP_EXIT38:%.*]]
|
|
// CHECK: omp.loop.exit38:
|
|
// CHECK-NEXT: [[TMP73:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP74:%.*]] = load i32, ptr [[TMP73]], align 4
|
|
// CHECK-NEXT: call void @__kmpc_distribute_static_fini(ptr addrspacecast (ptr addrspace(1) @[[GLOB2]] to ptr), i32 [[TMP74]])
|
|
// CHECK-NEXT: br label [[OMP_PRECOND_END39]]
|
|
// CHECK: omp.precond.end39:
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_omp_outlined_omp_outlined
|
|
// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR7]] {
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[K:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[K6:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTGLOBAL_TID__ADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTBOUND_TID__ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTBOUND_TID__ADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTPREVIOUS_LB__ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTPREVIOUS_LB__ADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTPREVIOUS_UB__ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTPREVIOUS_UB__ADDR]] to ptr
|
|
// CHECK-NEXT: [[N_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[N_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR]] to ptr
|
|
// CHECK-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[A_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR2]] to ptr
|
|
// CHECK-NEXT: [[B_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B_ADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IV_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IV]] to ptr
|
|
// CHECK-NEXT: [[TMP_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[TMP]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR__ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_3]] to ptr
|
|
// CHECK-NEXT: [[K_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_LB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_LB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_UB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_UB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_STRIDE_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_STRIDE]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IS_LAST_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IS_LAST]] to ptr
|
|
// CHECK-NEXT: [[K6_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K6]] to ptr
|
|
// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[N]], ptr [[N_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[B_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0
|
|
// CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
|
|
// CHECK-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
|
|
// CHECK: omp.precond.then:
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32
|
|
// CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP10]] to i32
|
|
// CHECK-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[CONV5]], ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
|
|
// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr addrspacecast (ptr addrspace(1) @[[GLOB3:[0-9]+]] to ptr), i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST_ASCAST]], ptr [[DOTOMP_LB_ASCAST]], ptr [[DOTOMP_UB_ASCAST]], ptr [[DOTOMP_STRIDE_ASCAST]], i32 1, i32 1)
|
|
// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
|
// CHECK: omp.inner.for.cond:
|
|
// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[CONV7:%.*]] = sext i32 [[TMP14]] to i64
|
|
// CHECK-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[CMP8:%.*]] = icmp ule i64 [[CONV7]], [[TMP15]]
|
|
// CHECK-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
|
// CHECK: omp.inner.for.body:
|
|
// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
|
|
// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK-NEXT: store i32 [[ADD]], ptr [[K6_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[K6_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 [[IDXPROM]]
|
|
// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
|
// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[K6_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP19]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM9]]
|
|
// CHECK-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX10]], align 4
|
|
// CHECK-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
|
// CHECK: omp.body.continue:
|
|
// CHECK-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
|
// CHECK: omp.inner.for.inc:
|
|
// CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE_ASCAST]], align 4
|
|
// CHECK-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
|
|
// CHECK-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
// CHECK: omp.inner.for.end:
|
|
// CHECK-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
|
|
// CHECK: omp.loop.exit:
|
|
// CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
|
|
// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr addrspacecast (ptr addrspace(1) @[[GLOB3]] to ptr), i32 [[TMP23]])
|
|
// CHECK-NEXT: br label [[OMP_PRECOND_END]]
|
|
// CHECK: omp.precond.end:
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_omp_outlined_omp_outlined_wrapper
|
|
// CHECK-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR8:[0-9]+]] {
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2, addrspace(5)
|
|
// CHECK-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[GLOBAL_ARGS:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTADDR1_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTADDR1]] to ptr
|
|
// CHECK-NEXT: [[DOTZERO_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTZERO_ADDR]] to ptr
|
|
// CHECK-NEXT: [[GLOBAL_ARGS_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[GLOBAL_ARGS]] to ptr
|
|
// CHECK-NEXT: store i16 [[TMP0]], ptr [[DOTADDR_ASCAST]], align 2
|
|
// CHECK-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTZERO_ADDR_ASCAST]], align 4
|
|
// CHECK-NEXT: call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS_ASCAST]])
|
|
// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 0
|
|
// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8
|
|
// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 1
|
|
// CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 8
|
|
// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 2
|
|
// CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[TMP7]], align 8
|
|
// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 3
|
|
// CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8
|
|
// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 4
|
|
// CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8
|
|
// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 5
|
|
// CHECK-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8
|
|
// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 6
|
|
// CHECK-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8
|
|
// CHECK-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_omp_outlined_omp_outlined(ptr [[DOTADDR1_ASCAST]], ptr [[DOTZERO_ADDR_ASCAST]], i64 [[TMP4]], i64 [[TMP6]], ptr [[TMP8]], i64 [[TMP10]], ptr [[TMP12]], i64 [[TMP14]], ptr [[TMP16]]) #[[ATTR1]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_omp_outlined_omp_outlined.1
|
|
// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR7]] {
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[K:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[K6:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTGLOBAL_TID__ADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTBOUND_TID__ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTBOUND_TID__ADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTPREVIOUS_LB__ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTPREVIOUS_LB__ADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTPREVIOUS_UB__ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTPREVIOUS_UB__ADDR]] to ptr
|
|
// CHECK-NEXT: [[N_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[N_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR]] to ptr
|
|
// CHECK-NEXT: [[C_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[C_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR2]] to ptr
|
|
// CHECK-NEXT: [[B_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B_ADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IV_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IV]] to ptr
|
|
// CHECK-NEXT: [[TMP_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[TMP]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR__ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_3]] to ptr
|
|
// CHECK-NEXT: [[K_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_LB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_LB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_UB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_UB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_STRIDE_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_STRIDE]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IS_LAST_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IS_LAST]] to ptr
|
|
// CHECK-NEXT: [[K6_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K6]] to ptr
|
|
// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[N]], ptr [[N_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[C]], ptr [[C_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[B_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[SUB:%.*]] = sub i32 [[TMP6]], -1
|
|
// CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[SUB]], 2
|
|
// CHECK-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1
|
|
// CHECK-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
|
|
// CHECK-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
|
|
// CHECK: omp.precond.then:
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32
|
|
// CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP10]] to i32
|
|
// CHECK-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[CONV5]], ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
|
|
// CHECK-NEXT: call void @__kmpc_for_static_init_4u(ptr addrspacecast (ptr addrspace(1) @[[GLOB3]] to ptr), i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST_ASCAST]], ptr [[DOTOMP_LB_ASCAST]], ptr [[DOTOMP_UB_ASCAST]], ptr [[DOTOMP_STRIDE_ASCAST]], i32 1, i32 1)
|
|
// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
|
|
// CHECK: omp.inner.for.cond:
|
|
// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[CONV7:%.*]] = zext i32 [[TMP14]] to i64
|
|
// CHECK-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[ADD:%.*]] = add i64 [[TMP15]], 1
|
|
// CHECK-NEXT: [[CMP8:%.*]] = icmp ult i64 [[CONV7]], [[ADD]]
|
|
// CHECK-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
|
|
// CHECK: omp.inner.for.body:
|
|
// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[MUL:%.*]] = mul i32 [[TMP16]], 2
|
|
// CHECK-NEXT: [[ADD9:%.*]] = add i32 0, [[MUL]]
|
|
// CHECK-NEXT: store i32 [[ADD9]], ptr [[K6_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[K6_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 [[IDXPROM]]
|
|
// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
|
// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[K6_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP19]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM10]]
|
|
// CHECK-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX11]], align 4
|
|
// CHECK-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
|
|
// CHECK: omp.body.continue:
|
|
// CHECK-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
|
|
// CHECK: omp.inner.for.inc:
|
|
// CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE_ASCAST]], align 4
|
|
// CHECK-NEXT: [[ADD12:%.*]] = add i32 [[TMP20]], [[TMP21]]
|
|
// CHECK-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
// CHECK: omp.inner.for.end:
|
|
// CHECK-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
|
|
// CHECK: omp.loop.exit:
|
|
// CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
|
|
// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr addrspacecast (ptr addrspace(1) @[[GLOB3]] to ptr), i32 [[TMP23]])
|
|
// CHECK-NEXT: br label [[OMP_PRECOND_END]]
|
|
// CHECK: omp.precond.end:
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_omp_outlined_omp_outlined.1_wrapper
|
|
// CHECK-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR8]] {
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2, addrspace(5)
|
|
// CHECK-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[GLOBAL_ARGS:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DOTADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTADDR]] to ptr
|
|
// CHECK-NEXT: [[DOTADDR1_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTADDR1]] to ptr
|
|
// CHECK-NEXT: [[DOTZERO_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTZERO_ADDR]] to ptr
|
|
// CHECK-NEXT: [[GLOBAL_ARGS_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[GLOBAL_ARGS]] to ptr
|
|
// CHECK-NEXT: store i16 [[TMP0]], ptr [[DOTADDR_ASCAST]], align 2
|
|
// CHECK-NEXT: store i32 [[TMP1]], ptr [[DOTADDR1_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTZERO_ADDR_ASCAST]], align 4
|
|
// CHECK-NEXT: call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS_ASCAST]])
|
|
// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 0
|
|
// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8
|
|
// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 1
|
|
// CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 8
|
|
// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 2
|
|
// CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[TMP7]], align 8
|
|
// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 3
|
|
// CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8
|
|
// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 4
|
|
// CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8
|
|
// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 5
|
|
// CHECK-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8
|
|
// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 6
|
|
// CHECK-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8
|
|
// CHECK-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l61_omp_outlined_omp_outlined.1(ptr [[DOTADDR1_ASCAST]], ptr [[DOTZERO_ADDR_ASCAST]], i64 [[TMP4]], i64 [[TMP6]], ptr [[TMP8]], i64 [[TMP10]], ptr [[TMP12]], i64 [[TMP14]], ptr [[TMP16]]) #[[ATTR1]]
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l72
|
|
// CHECK-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR11:[0-9]+]] {
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[K:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[N_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[N_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR]] to ptr
|
|
// CHECK-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[A_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR2]] to ptr
|
|
// CHECK-NEXT: [[B_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B_ADDR]] to ptr
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DYN_PTR_ADDR]] to ptr
|
|
// CHECK-NEXT: [[K_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR__ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_3]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_LB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_LB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_UB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_UB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IV_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IV]] to ptr
|
|
// CHECK-NEXT: store i64 [[N]], ptr [[N_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: call void @__kmpc_specialized_kernel_init()
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
|
|
// CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
|
|
// CHECK-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
|
|
// CHECK-NEXT: [[GPU_BLOCK_ID:%.*]] = call i32 @llvm.amdgcn.workgroup.id.x()
|
|
// CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[GPU_BLOCK_ID]], [[NVPTX_NUM_THREADS]]
|
|
// CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP8]]
|
|
// CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP10]], 1
|
|
// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP11]], [[TMP12]]
|
|
// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
|
|
// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK-NEXT: store i32 [[ADD]], ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
|
|
// CHECK-NEXT: br i1 [[CMP]], label [[OMP_KERNEL_BODY:%.*]], label [[OMP_KERNEL_DONE:%.*]]
|
|
// CHECK: omp.kernel.body:
|
|
// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]]
|
|
// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
|
// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM5]]
|
|
// CHECK-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4
|
|
// CHECK-NEXT: br label [[OMP_KERNEL_DONE]]
|
|
// CHECK: omp.kernel.done:
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l77
|
|
// CHECK-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] {
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[K:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[N_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[N_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR]] to ptr
|
|
// CHECK-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[A_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR2]] to ptr
|
|
// CHECK-NEXT: [[B_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B_ADDR]] to ptr
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DYN_PTR_ADDR]] to ptr
|
|
// CHECK-NEXT: [[K_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR__ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_3]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_LB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_LB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_UB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_UB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IV_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IV]] to ptr
|
|
// CHECK-NEXT: store i64 [[N]], ptr [[N_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: call void @__kmpc_specialized_kernel_init()
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
|
|
// CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
|
|
// CHECK-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
|
|
// CHECK-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB_ASCAST]], align 4
|
|
// CHECK-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
|
|
// CHECK-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
|
|
// CHECK-NEXT: [[GPU_BLOCK_ID:%.*]] = call i32 @llvm.amdgcn.workgroup.id.x()
|
|
// CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[GPU_BLOCK_ID]], [[NVPTX_NUM_THREADS]]
|
|
// CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP8]]
|
|
// CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP10]], 1
|
|
// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP11]], [[TMP12]]
|
|
// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
|
|
// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
|
|
// CHECK-NEXT: store i32 [[ADD]], ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB_ASCAST]], align 4
|
|
// CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
|
|
// CHECK-NEXT: br i1 [[CMP]], label [[OMP_KERNEL_BODY:%.*]], label [[OMP_KERNEL_DONE:%.*]]
|
|
// CHECK: omp.kernel.body:
|
|
// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]]
|
|
// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
|
// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i64
|
|
// CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM5]]
|
|
// CHECK-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4
|
|
// CHECK-NEXT: br label [[OMP_KERNEL_DONE]]
|
|
// CHECK: omp.kernel.done:
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84
|
|
// CHECK-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR4]] {
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
|
|
// CHECK-NEXT: [[K:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4, addrspace(5)
|
|
// CHECK-NEXT: [[N_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[N_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR]] to ptr
|
|
// CHECK-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[A_ADDR]] to ptr
|
|
// CHECK-NEXT: [[VLA_ADDR2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VLA_ADDR2]] to ptr
|
|
// CHECK-NEXT: [[B_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B_ADDR]] to ptr
|
|
// CHECK-NEXT: [[DYN_PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DYN_PTR_ADDR]] to ptr
|
|
// CHECK-NEXT: [[K_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[K]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR__ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_]] to ptr
|
|
// CHECK-NEXT: [[DOTCAPTURE_EXPR_3_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTCAPTURE_EXPR_3]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_LB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_LB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_UB_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_UB]] to ptr
|
|
// CHECK-NEXT: [[DOTOMP_IV_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DOTOMP_IV]] to ptr
|
|
// CHECK-NEXT: store i64 [[N]], ptr [[N_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR2_ASCAST]], align 8
|
|
// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR_ASCAST]], align 8, !nonnull [[META13]], !align [[META14]]
|
|
// CHECK-NEXT: call void @__kmpc_specialized_kernel_init()
|
|
// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR_ASCAST]], align 4
|
|
// CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 2
|
|
// CHECK-NEXT: store i32 [[DIV]], ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ASCAST]], align 4
|
|
// CHECK-NEXT: [[SUB:%.*]] = sub i32 [[TMP5]], -1
|
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// CHECK-NEXT: [[DIV4:%.*]] = udiv i32 [[SUB]], 2
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// CHECK-NEXT: [[SUB5:%.*]] = sub i32 [[DIV4]], 1
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// CHECK-NEXT: store i32 [[SUB5]], ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
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// CHECK-NEXT: store i32 0, ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB_ASCAST]], align 4
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// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_ASCAST]], align 4
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// CHECK-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB_ASCAST]], align 4
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// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB_ASCAST]], align 4
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// CHECK-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
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// CHECK-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
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// CHECK-NEXT: [[GPU_BLOCK_ID:%.*]] = call i32 @llvm.amdgcn.workgroup.id.x()
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// CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[GPU_BLOCK_ID]], [[NVPTX_NUM_THREADS]]
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// CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP8]]
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// CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP10]], 1
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// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP11]], [[TMP12]]
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// CHECK-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[MUL:%.*]] = mul i32 [[TMP14]], 2
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// CHECK-NEXT: [[ADD:%.*]] = add i32 0, [[MUL]]
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// CHECK-NEXT: store i32 [[ADD]], ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV_ASCAST]], align 4
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// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB_ASCAST]], align 4
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// CHECK-NEXT: [[ADD6:%.*]] = add i32 [[TMP16]], 1
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// CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP15]], [[ADD6]]
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// CHECK-NEXT: br i1 [[CMP]], label [[OMP_KERNEL_BODY:%.*]], label [[OMP_KERNEL_DONE:%.*]]
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// CHECK: omp.kernel.body:
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// CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
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// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]]
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// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
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// CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr [[K_ASCAST]], align 4
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// CHECK-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP19]] to i64
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// CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM7]]
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// CHECK-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX8]], align 4
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// CHECK-NEXT: br label [[OMP_KERNEL_DONE]]
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// CHECK: omp.kernel.done:
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// CHECK-NEXT: ret void
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//
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