derek.holloway
7502bf64a4
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80 lines
3.7 KiB
C
80 lines
3.7 KiB
C
// RUN: %clang_cc1 -triple %itanium_abi_triple %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping -fcoverage-mcdc | FileCheck %s -check-prefix=MCDC
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// RUN: %clang_cc1 -triple %itanium_abi_triple %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping | FileCheck %s -check-prefix=NOMCDC
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int test(int a, int b, int c, int d, int e, int f) {
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return ((a || b) ? (c && d) : (e || f));
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}
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// NOMCDC-NOT: %mcdc.addr
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// NOMCDC-NOT: __profbm_test
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// MCDC BOOKKEEPING.
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// MCDC: @__profbm_test = private global [2 x i8] zeroinitializer
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// ALLOCATE MCDC TEMP AND ZERO IT.
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// MCDC-LABEL: @test(
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// MCDC: %[[ADDR0:mcdc.+]] = alloca i32, align 4
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// MCDC: %[[ADDR1:mcdc.+]] = alloca i32, align 4
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// MCDC: %[[ADDR2:mcdc.+]] = alloca i32, align 4
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// MCDC: store i32 0, ptr %[[ADDR0]], align 4
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// TERNARY TRUE SHOULD UPDATE THE BITMAP WITH RESULT AT ELEMENT 0.
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// MCDC-LABEL: cond.true:
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// MCDC-DAG: %[[TEMP0:mcdc.temp[0-9]*]] = load i32, ptr %[[ADDR0]], align 4
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// MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 0
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// MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 3
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// MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]
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// MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 7
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// MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i8
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// MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]
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// MCDC: %[[LAB8:.+]] = load i8, ptr %[[LAB4]], align 1
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// MCDC: %[[LAB9:[0-9]+]] = or i8 %[[LAB8]], %[[LAB7]]
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// MCDC: store i8 %[[LAB9]], ptr %[[LAB4]], align 1
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// CHECK FOR ZERO OF MCDC TEMP
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// MCDC: store i32 0, ptr %[[ADDR1]], align 4
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// TERNARY TRUE YIELDS TERNARY LHS LOGICAL-AND.
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// TERNARY LHS LOGICAL-AND SHOULD UPDATE THE BITMAP WITH RESULT AT ELEMENT 1.
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// MCDC-LABEL: land.end:
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// MCDC-DAG: %[[TEMP0:mcdc.temp[0-9]*]] = load i32, ptr %[[ADDR1]], align 4
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// MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 3
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// MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 3
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// MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]
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// MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 7
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// MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i8
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// MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]
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// MCDC: %[[LAB8:.+]] = load i8, ptr %[[LAB4]], align 1
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// MCDC: %[[LAB9:[0-9]+]] = or i8 %[[LAB8]], %[[LAB7]]
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// MCDC: store i8 %[[LAB9]], ptr %[[LAB4]], align 1
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// TERNARY FALSE SHOULD UPDATE THE BITMAP WITH RESULT AT ELEMENT 0.
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// MCDC-LABEL: cond.false:
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// MCDC-DAG: %[[TEMP0:mcdc.+]] = load i32, ptr %[[ADDR0]], align 4
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// MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 0
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// MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 3
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// MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]
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// MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 7
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// MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i8
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// MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]
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// MCDC: %[[LAB8:.+]] = load i8, ptr %[[LAB4]], align 1
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// MCDC: %[[LAB9:[0-9]+]] = or i8 %[[LAB8]], %[[LAB7]]
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// MCDC: store i8 %[[LAB9]], ptr %[[LAB4]], align 1
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// CHECK FOR ZERO OF MCDC TEMP
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// MCDC: store i32 0, ptr %[[ADDR2]], align 4
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// TERNARY FALSE YIELDS TERNARY RHS LOGICAL-OR.
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// TERNARY RHS LOGICAL-OR SHOULD UPDATE THE BITMAP WITH RESULT AT ELEMENT 2.
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// MCDC-LABEL: lor.end:
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// MCDC-DAG: %[[TEMP0:mcdc.temp[0-9]*]] = load i32, ptr %[[ADDR2]], align 4
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// MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 6
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// MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 3
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// MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]
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// MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 7
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// MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i8
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// MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]
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// MCDC: %[[LAB8:.+]] = load i8, ptr %[[LAB4]], align 1
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// MCDC: %[[LAB9:[0-9]+]] = or i8 %[[LAB8]], %[[LAB7]]
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// MCDC: store i8 %[[LAB9]], ptr %[[LAB4]], align 1
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