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130 lines
3.8 KiB
ArmAsm
130 lines
3.8 KiB
ArmAsm
// REQUIRES: aarch64
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// RUN: rm -rf %t && split-file %s %t && cd %t
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// RUN: llvm-mc -filetype=obj -triple=aarch64 asm -o a.o
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// RUN: ld.lld --script=lds a.o -o out
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// RUN: llvm-objdump -d --no-show-raw-insn out | FileCheck %s
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/// Test that a thunk that at creation time does not need to use a BTI
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/// compatible landing pad, but due to other thunk insertion ends up
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/// out of short-branch range so a BTI thunk is required after all.
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//--- asm
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.section ".note.gnu.property", "a"
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.p2align 3
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.long 4
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.long 0x10
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.long 0x5
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.asciz "GNU"
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/// Enable BTI.
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.long 0xc0000000 // GNU_PROPERTY_AARCH64_FEATURE_1_AND.
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.long 4
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.long 1 // GNU_PROPERTY_AARCH64_FEATURE_1_BTI.
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.long 0
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.section .text.0, "ax", %progbits
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.balign 0x1000
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.global _start
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.type _start, %function
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_start:
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/// Call that requires a thunk.
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bl fn1
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bl fn2
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/// padding so that the thunk for fn1 is placed after this section is
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/// sufficiently close to the target to be within short range, but only
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/// just so that a small displacement will mean a long thunk is needed.
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.space 0x1000
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/// Thunk for call to fn1 will be placed here. Initially it is in short Thunk
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/// range of fn1, but due to a thunk added after a later section it won't be
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/// and will need a long branch thunk, which in turn needs a BTI landing pad.
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// CHECK-LABEL: <_start>:
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// CHECK-NEXT: 10001000: bl 0x10002008 <__AArch64AbsLongThunk_fn1>
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// CHECK-NEXT: bl 0x10002018 <__AArch64AbsLongThunk_fn2>
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// CHECK-LABEL: <__AArch64AbsLongThunk_fn1>:
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// CHECK-NEXT: 10002008: ldr x16, 0x10002010 <__AArch64AbsLongThunk_fn1+0x8>
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// CHECK-NEXT: br x16
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// CHECK-NEXT: 00 30 00 18 .word 0x18003000
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// CHECK-NEXT: 00 00 00 00 .word 0x00000000
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// CHECK-LABEL: <__AArch64AbsLongThunk_fn2>:
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// CHECK-NEXT: 10002018: ldr x16, 0x10002020 <__AArch64AbsLongThunk_fn2+0x8>
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// CHECK-NEXT: br x16
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// CHECK-NEXT: 04 40 00 18 .word 0x18004004
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// CHECK-NEXT: 00 00 00 00 .word 0x00000000
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.section .text.1, "ax", %progbits
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.balign 0x1000
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.global farcall
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.type farcall, %function
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farcall:
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/// Call that requires a thunk.
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bl far
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/// Section is aligned to 0x1000 boundary with size multipe of 0x1000.
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.space 0x1000 - (. - farcall)
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/// Thunk for call to far will be placed here. This will force text.2
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/// on to the next alignment boundary, moving it further away from the
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/// thunk inserted in the .text_low output section.
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// CHECK-LABEL: <farcall>:
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// CHECK-NEXT: 18001000: bl 0x18002000 <__AArch64AbsLongThunk_far>
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// CHECK-LABEL: <__AArch64AbsLongThunk_far>:
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// CHECK-NEXT: 18002000: ldr x16, 0x18002008 <__AArch64AbsLongThunk_far+0x8>
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// CHECK-NEXT: br x16
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// CHECK-NEXT: 00 00 00 30 .word 0x30000000
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// CHECK-NEXT: 00 00 00 00 .word 0x00000000
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.section .text.2, "ax", %progbits
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.balign 0x1000
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.global fn1
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.type fn1, %function
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fn1:
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ret
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.section .text.3, "ax", %progbits
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.global fn2
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.type fn2, %function
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fn2:
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ret
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.section .text.far, "ax", %progbits
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.type far, %function
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.global far
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far:
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ret
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// CHECK-LABEL: <__AArch64BTIThunk_fn1>:
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// CHECK-NEXT: 18003000: bti c
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// CHECK-NExT: b 0x18004000 <fn1>
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// CHECK-LABEL: <fn1>:
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// CHECK-NEXT: 18004000: ret
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// CHECK-LABEL: <__AArch64BTIThunk_fn2>:
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// CHECK-NEXT: 18004004: bti c
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// CHECK-LABEL: <fn2>:
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// CHECK-NEXT: 18004008: ret
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// CHECK-LABEL: <__AArch64BTIThunk_far>:
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// CHECK-NEXT: 30000000: bti c
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// CHECK-LABEL: <far>:
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// CHECK-NEXT: 30000004: ret
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//--- lds
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PHDRS {
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low PT_LOAD FLAGS(0x1 | 0x4);
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mid PT_LOAD FLAGS(0x1 | 0x4);
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high PT_LOAD FLAGS(0x1 | 0x4);
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}
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SECTIONS {
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.rodata 0x10000000 : { *(.note.gnu.property) } :low
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.text_low : { *(.text.0) } :low
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.text 0x18001000 : { *(.text.1) } :mid
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.text_aligned : { *(.text.2) *(.text.3) } :mid
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.text_high 0x30000000 : { *(.text.far) } :high
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}
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