derek.holloway
7502bf64a4
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61 lines
2.0 KiB
ArmAsm
61 lines
2.0 KiB
ArmAsm
# REQUIRES: loongarch
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# RUN: rm -rf %t && split-file %s %t
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# RUN: llvm-mc --filetype=obj --triple=loongarch32-unknown-elf %t/a.s -o %t/a.la32.o
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# RUN: llvm-mc --filetype=obj --triple=loongarch64-unknown-elf %t/a.s -o %t/a.la64.o
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# RUN: ld.lld %t/a.la32.o -shared -T %t/a.t -o %t/a.la32.so
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# RUN: ld.lld %t/a.la64.o -shared -T %t/a.t -o %t/a.la64.so
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# RUN: llvm-objdump -d --no-show-raw-insn %t/a.la32.so | FileCheck --check-prefixes=DIS,DIS32 %s
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# RUN: llvm-objdump -d --no-show-raw-insn %t/a.la64.so | FileCheck --check-prefixes=DIS,DIS64 %s
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## PLT should be present in this case.
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# DIS: Disassembly of section .plt:
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# DIS: <.plt>:
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# DIS: 234020: pcaddu12i $t3, 510
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# DIS32-NEXT: ld.w $t3, $t3, 84
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# DIS64-NEXT: ld.d $t3, $t3, 184
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# DIS-NEXT: jirl $t1, $t3, 0
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# DIS-NEXT: nop
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# DIS: Disassembly of section .text:
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# DIS: <foo>:
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# DIS-NEXT: nop
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# DIS-NEXT: nop
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# DIS-NEXT: nop
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# DIS-NEXT: pcalau12i $t0, -510
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# DIS-NEXT: jirl $zero, $t0, 32
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# RUN: llvm-mc --filetype=obj --triple=loongarch32-unknown-elf %t/error.s -o %t/error.la32.o
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# RUN: llvm-mc --filetype=obj --triple=loongarch64-unknown-elf %t/error.s -o %t/error.la64.o
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# RUN: not ld.lld %t/error.la32.o -shared -o %t/error.la32.so 2>&1 | FileCheck --check-prefix=ERR %s
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# RUN: not ld.lld %t/error.la64.o -shared -o %t/error.la64.so 2>&1 | FileCheck --check-prefix=ERR %s
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# ERR: error: relocation R_LARCH_PCALA_LO12 cannot be used against symbol 'bar'; recompile with -fPIC
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#--- a.t
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SECTIONS {
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.plt 0x234000: { *(.plt) }
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.text 0x432000: { *(.text) }
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}
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#--- a.s
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.p2align 12
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.global foo
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foo:
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## The nops are for pushing the relocs off page boundary, to better see the
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## page-aligned semantics in action.
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nop
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nop
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nop
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## The offsets should be -510 (0x234 - 0x432) and 32 (PLT header size + 0)
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## respectively.
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pcalau12i $t0, %pc_hi20(bar)
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jirl $zero, $t0, %pc_lo12(bar)
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#--- error.s
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.global foo
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foo:
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pcalau12i $t0, %pc_hi20(bar)
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ld.w $t0, $t0, %pc_lo12(bar)
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