derek.holloway
7502bf64a4
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93 lines
3.2 KiB
ArmAsm
93 lines
3.2 KiB
ArmAsm
# REQUIRES: loongarch
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## Test LA64 IE -> LE in various cases.
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# RUN: llvm-mc --filetype=obj --triple=loongarch64 -mattr=+relax %s -o %t.o
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## Also check --emit-relocs.
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# RUN: ld.lld --emit-relocs %t.o -o %t
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# RUN: llvm-readelf -x .got %t 2>&1 | FileCheck --check-prefix=LE-GOT %s
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# RUN: llvm-objdump -dr --no-show-raw-insn %t | FileCheck --check-prefixes=LER %s
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# RUN: ld.lld --emit-relocs --no-relax %t.o -o %t.norelax
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# RUN: llvm-readelf -x .got %t.norelax 2>&1 | FileCheck --check-prefix=LE-GOT %s
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# RUN: llvm-objdump -dr --no-show-raw-insn %t.norelax | FileCheck --check-prefixes=LE %s
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# LE-GOT: could not find section '.got'
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# a@tprel = st_value(a) = 0xfff
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# b@tprel = st_value(a) = 0x1000
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# LE: 20158: nop
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# LE-NEXT: R_LARCH_TLS_IE_PC_HI20 a
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# LE-NEXT: R_LARCH_RELAX *ABS*
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# LE-NEXT: ori $a0, $zero, 4095
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# LE-NEXT: R_LARCH_TLS_IE_PC_LO12 a
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# LE-NEXT: R_LARCH_RELAX *ABS*
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# LE-NEXT: add.d $a0, $a0, $tp
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# LE-NEXT: 20164: lu12i.w $a1, 1
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# LE-NEXT: R_LARCH_TLS_IE_PC_HI20 b
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# LE-NEXT: ori $a1, $a1, 0
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# LE-NEXT: R_LARCH_TLS_IE_PC_LO12 b
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# LE-NEXT: add.d $a1, $a1, $tp
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# LE-NEXT: 20170: nop
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# LE-NEXT: R_LARCH_TLS_IE_PC_HI20 a
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# LE-NEXT: R_LARCH_RELAX *ABS*
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# LE-NEXT: lu12i.w $a3, 1
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# LE-NEXT: R_LARCH_TLS_IE_PC_HI20 b
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# LE-NEXT: R_LARCH_RELAX *ABS*
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# LE-NEXT: ori $a2, $zero, 4095
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# LE-NEXT: R_LARCH_TLS_IE_PC_LO12 a
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# LE-NEXT: ori $a3, $a3, 0
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# LE-NEXT: R_LARCH_TLS_IE_PC_LO12 b
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# LE-NEXT: add.d $a2, $a2, $tp
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# LE-NEXT: add.d $a3, $a3, $tp
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# LER: 20158: ori $a0, $zero, 4095
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# LER-NEXT: R_LARCH_TLS_IE_PC_HI20 a
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# LER-NEXT: R_LARCH_RELAX *ABS*
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# LER-NEXT: R_LARCH_TLS_IE_PC_LO12 a
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# LER-NEXT: R_LARCH_RELAX *ABS*
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# LER-NEXT: add.d $a0, $a0, $tp
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# LER-NEXT: 20160: lu12i.w $a1, 1
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# LER-NEXT: R_LARCH_TLS_IE_PC_HI20 b
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# LER-NEXT: ori $a1, $a1, 0
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# LER-NEXT: R_LARCH_TLS_IE_PC_LO12 b
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# LER-NEXT: add.d $a1, $a1, $tp
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# LER-NEXT: 2016c: lu12i.w $a3, 1
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# LER-NEXT: R_LARCH_TLS_IE_PC_HI20 a
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# LER-NEXT: R_LARCH_RELAX *ABS*
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# LER-NEXT: R_LARCH_TLS_IE_PC_HI20 b
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# LER-NEXT: R_LARCH_RELAX *ABS*
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# LER-NEXT: ori $a2, $zero, 4095
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# LER-NEXT: R_LARCH_TLS_IE_PC_LO12 a
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# LER-NEXT: ori $a3, $a3, 0
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# LER-NEXT: R_LARCH_TLS_IE_PC_LO12 b
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# LER-NEXT: add.d $a2, $a2, $tp
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# LER-NEXT: add.d $a3, $a3, $tp
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la.tls.ie $a0, a # relax
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add.d $a0, $a0, $tp
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# PCALAU12I does not have R_LARCH_RELAX. No relaxation.
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pcalau12i $a1, %ie_pc_hi20(b)
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ld.d $a1, $a1, %ie_pc_lo12(b)
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add.d $a1, $a1, $tp
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# Test instructions are interleaved.
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# PCALAU12I has an R_LARCH_RELAX. We perform relaxation.
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pcalau12i $a2, %ie_pc_hi20(a)
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.reloc .-4, R_LARCH_RELAX, 0
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pcalau12i $a3, %ie_pc_hi20(b)
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.reloc .-4, R_LARCH_RELAX, 0
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ld.d $a2, $a2, %ie_pc_lo12(a)
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ld.d $a3, $a3, %ie_pc_lo12(b)
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add.d $a2, $a2, $tp
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add.d $a3, $a3, $tp
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.section .tbss,"awT",@nobits
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.globl a
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.zero 0xfff ## Place a at 0xfff, LE needs only one ins.
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a:
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.zero 1 ## Place b at 0x1000, LE needs two ins.
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b:
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.zero 4
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