derek.holloway
7502bf64a4
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40 lines
1.2 KiB
ArmAsm
40 lines
1.2 KiB
ArmAsm
# REQUIRES: riscv
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# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+relax %s -o %t.32.o
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# RUN: ld.lld -pie %t.32.o -o %t.32
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# RUN: llvm-readelf -x .rodata -x .debug_info %t.32 | FileCheck --check-prefix=HEX %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+relax %s -o %t.64.o
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# RUN: ld.lld -shared %t.64.o -o %t.64
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# RUN: llvm-readelf -x .rodata -x .debug_info %t.64 | FileCheck --check-prefix=HEX %s
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# HEX: section '.rodata':
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# HEX-NEXT: 0x{{[0-9a-f]+}} 04000000 00000000 04000000 040004
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# HEX: section '.debug_info':
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# HEX-NEXT: 0x{{[0-9a-f]+}} 04000000 00000000
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## R_RISCV_ADD* and R_RISCV_SUB* are link-time constants, otherwise they are
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## not allowed in -pie/-shared mode. Place .L0 and .L1 in distinct sections so
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## the assembler cannot fold the differences.
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.section .text.f0,"ax",@progbits
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.globl _start
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_start:
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.L0:
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ret
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.section .text.f1,"ax",@progbits
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.L1:
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ret
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.rodata
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.dword .L1 - .L0
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.word .L1 - .L0
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.half .L1 - .L0
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.byte .L1 - .L0
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## Debug section may use R_RISCV_ADD64/R_RISCV_SUB64 pairs to measure lengths
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## of code ranges (e.g. DW_AT_high_pc). Check we allow R_RISCV_ADD*/R_RISCV_SUB*
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## in such non-SHF_ALLOC sections in -pie/-shared mode.
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.section .debug_info
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.quad .L1 - .L0
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