derek.holloway
7502bf64a4
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132 lines
4.0 KiB
CMake
132 lines
4.0 KiB
CMake
add_llvm_component_group(AArch64 HAS_JIT)
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set(LLVM_TARGET_DEFINITIONS AArch64.td)
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tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
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tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
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tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
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tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
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tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
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tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel -gisel-extended-llt)
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tablegen(LLVM AArch64GenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner
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-combiners="AArch64O0PreLegalizerCombiner")
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tablegen(LLVM AArch64GenPreLegalizeGICombiner.inc -gen-global-isel-combiner
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-combiners="AArch64PreLegalizerCombiner")
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tablegen(LLVM AArch64GenPostLegalizeGICombiner.inc -gen-global-isel-combiner
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-combiners="AArch64PostLegalizerCombiner")
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tablegen(LLVM AArch64GenPostLegalizeGILowering.inc -gen-global-isel-combiner
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-combiners="AArch64PostLegalizerLowering")
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tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)
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tablegen(LLVM AArch64GenMCPseudoLowering.inc -gen-pseudo-lowering)
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tablegen(LLVM AArch64GenRegisterBank.inc -gen-register-bank)
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tablegen(LLVM AArch64GenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM AArch64GenSDNodeInfo.inc -gen-sd-node-info)
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tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM AArch64GenSystemOperands.inc -gen-searchable-tables)
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tablegen(LLVM AArch64GenExegesis.inc -gen-exegesis)
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add_public_tablegen_target(AArch64CommonTableGen)
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add_llvm_target(AArch64CodeGen
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GISel/AArch64CallLowering.cpp
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GISel/AArch64GlobalISelUtils.cpp
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GISel/AArch64InstructionSelector.cpp
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GISel/AArch64LegalizerInfo.cpp
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GISel/AArch64O0PreLegalizerCombiner.cpp
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GISel/AArch64PreLegalizerCombiner.cpp
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GISel/AArch64PostLegalizerCombiner.cpp
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GISel/AArch64PostLegalizerLowering.cpp
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GISel/AArch64PostSelectOptimize.cpp
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GISel/AArch64RegisterBankInfo.cpp
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AArch64A57FPLoadBalancing.cpp
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AArch64CodeLayoutOpt.cpp
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AArch64AdvSIMDScalarPass.cpp
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AArch64Arm64ECCallLowering.cpp
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AArch64AsmPrinter.cpp
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AArch64BranchTargets.cpp
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AArch64CallingConvention.cpp
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AArch64CleanupLocalDynamicTLSPass.cpp
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AArch64CollectLOH.cpp
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AArch64CondBrTuning.cpp
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AArch64ConditionalCompares.cpp
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AArch64DeadRegisterDefinitionsPass.cpp
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AArch64ExpandImm.cpp
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AArch64ExpandPseudoInsts.cpp
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AArch64FalkorHWPFFix.cpp
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AArch64FastISel.cpp
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AArch64A53Fix835769.cpp
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AArch64FrameLowering.cpp
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AArch64CompressJumpTables.cpp
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AArch64ConditionOptimizer.cpp
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AArch64RedundantCopyElimination.cpp
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AArch64RedundantCondBranchPass.cpp
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AArch64ISelDAGToDAG.cpp
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AArch64ISelLowering.cpp
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AArch64InstrInfo.cpp
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AArch64LoadStoreOptimizer.cpp
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AArch64LowerHomogeneousPrologEpilog.cpp
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AArch64MachineFunctionInfo.cpp
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AArch64MachineScheduler.cpp
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AArch64MacroFusion.cpp
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AArch64MIPeepholeOpt.cpp
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AArch64MCInstLower.cpp
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AArch64PointerAuth.cpp
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AArch64PostCoalescerPass.cpp
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AArch64PromoteConstant.cpp
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AArch64PBQPRegAlloc.cpp
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AArch64RegisterInfo.cpp
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AArch64SMEAttributes.cpp
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AArch64SLSHardening.cpp
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AArch64SelectionDAGInfo.cpp
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AArch64SpeculationHardening.cpp
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AArch64StackTagging.cpp
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AArch64StackTaggingPreRA.cpp
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AArch64StorePairSuppress.cpp
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AArch64Subtarget.cpp
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AArch64TargetMachine.cpp
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AArch64TargetObjectFile.cpp
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AArch64TargetTransformInfo.cpp
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SMEPeepholeOpt.cpp
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SVEIntrinsicOpts.cpp
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MachineSMEABIPass.cpp
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AArch64SRLTDefineSuperRegs.cpp
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AArch64SIMDInstrOpt.cpp
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AArch64PrologueEpilogue.cpp
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DEPENDS
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intrinsics_gen
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LINK_COMPONENTS
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AArch64Desc
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AArch64Info
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AArch64Utils
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Analysis
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AsmPrinter
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CFGuard
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CodeGen
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CodeGenTypes
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Core
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GlobalISel
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MC
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Passes
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Scalar
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SelectionDAG
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Support
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Target
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TargetParser
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TransformUtils
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Vectorize
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ADD_TO_COMPONENT
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AArch64
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)
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add_subdirectory(AsmParser)
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add_subdirectory(Disassembler)
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add_subdirectory(MCTargetDesc)
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add_subdirectory(TargetInfo)
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add_subdirectory(Utils)
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