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34 lines
1.4 KiB
TableGen
34 lines
1.4 KiB
TableGen
//===- LoongArchLVZInstrInfo.td - LoongArch LVZ instructions -*- tablegen -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the LVZ extension instructions.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Instructions
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//===----------------------------------------------------------------------===//
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let hasSideEffects = 1, mayLoad = 0, mayStore = 0, Predicates = [HasExtLVZ] in {
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def GCSRRD : FmtCSR<0x05000000, (outs GPR:$rd), (ins uimm14:$csr_num),
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"$rd, $csr_num">;
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let Constraints = "$rd = $dst" in {
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def GCSRWR : FmtCSR<0x05000020, (outs GPR:$dst),
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(ins GPR:$rd, uimm14:$csr_num), "$rd, $csr_num">;
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def GCSRXCHG : FmtCSRXCHG<0x05000000, (outs GPR:$dst),
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(ins GPR:$rd, GPRNoR0R1:$rj, uimm14:$csr_num),
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"$rd, $rj, $csr_num">;
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} // Constraints = "$rd = $dst"
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def GTLBFLUSH : FmtI32<0x06482401>;
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def HVCL : MISC_I15<0x002b8000>;
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} // hasSideEffects = 1, mayLoad = 0, mayStore = 0, Predicates = [HasExtLVZ]
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