derek.holloway
7502bf64a4
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187 lines
11 KiB
LLVM
187 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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; Check icmp for legal integer vectors.
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define void @cmp_legal_int() {
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; CHECK-LABEL: 'cmp_legal_int'
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %1 = icmp ne <vscale x 2 x i64> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %2 = icmp ne <vscale x 4 x i32> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %3 = icmp ne <vscale x 8 x i16> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %4 = icmp ne <vscale x 16 x i8> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
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;
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%1 = icmp ne <vscale x 2 x i64> undef, undef
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%2 = icmp ne <vscale x 4 x i32> undef, undef
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%3 = icmp ne <vscale x 8 x i16> undef, undef
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%4 = icmp ne <vscale x 16 x i8> undef, undef
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ret void
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}
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; Check icmp for an illegal integer vector.
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define <vscale x 4 x i1> @cmp_nxv4i64() {
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; CHECK-LABEL: 'cmp_nxv4i64'
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; CHECK-NEXT: Cost Model: Found costs of 2 for: %res = icmp ne <vscale x 4 x i64> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <vscale x 4 x i1> %res
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;
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%res = icmp ne <vscale x 4 x i64> undef, undef
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ret <vscale x 4 x i1> %res
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}
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; Check icmp for legal predicate vectors.
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define void @cmp_legal_pred() {
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; CHECK-LABEL: 'cmp_legal_pred'
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %1 = icmp ne <vscale x 2 x i1> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %2 = icmp ne <vscale x 4 x i1> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %3 = icmp ne <vscale x 8 x i1> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %4 = icmp ne <vscale x 16 x i1> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
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;
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%1 = icmp ne <vscale x 2 x i1> undef, undef
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%2 = icmp ne <vscale x 4 x i1> undef, undef
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%3 = icmp ne <vscale x 8 x i1> undef, undef
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%4 = icmp ne <vscale x 16 x i1> undef, undef
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ret void
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}
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; Check icmp for an illegal predicate vector.
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define <vscale x 32 x i1> @cmp_nxv32i1() {
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; CHECK-LABEL: 'cmp_nxv32i1'
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; CHECK-NEXT: Cost Model: Found costs of 2 for: %res = icmp ne <vscale x 32 x i1> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <vscale x 32 x i1> %res
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;
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%res = icmp ne <vscale x 32 x i1> undef, undef
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ret <vscale x 32 x i1> %res
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}
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; Check fcmp for legal FP vectors
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define void @cmp_legal_fp() #0 {
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; CHECK-LABEL: 'cmp_legal_fp'
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; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:1 Lat:2 SizeLat:1 for: %1 = fcmp oge <vscale x 2 x double> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:1 Lat:2 SizeLat:1 for: %2 = fcmp oge <vscale x 4 x float> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:1 Lat:2 SizeLat:1 for: %3 = fcmp oge <vscale x 8 x half> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:13 CodeSize:11 Lat:11 SizeLat:11 for: %4 = fcmp oge <vscale x 8 x bfloat> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
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;
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%1 = fcmp oge <vscale x 2 x double> undef, undef
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%2 = fcmp oge <vscale x 4 x float> undef, undef
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%3 = fcmp oge <vscale x 8 x half> undef, undef
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%4 = fcmp oge <vscale x 8 x bfloat> undef, undef
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ret void
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}
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; Check fcmp for an illegal FP vector
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define <vscale x 16 x i1> @cmp_nxv16f16() {
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; CHECK-LABEL: 'cmp_nxv16f16'
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; CHECK-NEXT: Cost Model: Found costs of RThru:4 CodeSize:2 Lat:2 SizeLat:2 for: %res = fcmp oge <vscale x 16 x half> undef, undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <vscale x 16 x i1> %res
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;
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%res = fcmp oge <vscale x 16 x half> undef, undef
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ret <vscale x 16 x i1> %res
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}
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; Check select for legal integer vectors
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define void @sel_legal_int() {
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; CHECK-LABEL: 'sel_legal_int'
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %1 = select <vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %2 = select <vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %3 = select <vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %4 = select <vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
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;
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%1 = select <vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef
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%2 = select <vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef
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%3 = select <vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef
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%4 = select <vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef
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ret void
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}
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; Check select for an illegal integer vector
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define <vscale x 16 x i16> @sel_nxv16i16() {
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; CHECK-LABEL: 'sel_nxv16i16'
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; CHECK-NEXT: Cost Model: Found costs of 2 for: %res = select <vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <vscale x 16 x i16> %res
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;
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%res = select <vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef
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ret <vscale x 16 x i16> %res
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}
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; Check select for a legal FP vector
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define void @sel_legal_fp() #0 {
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; CHECK-LABEL: 'sel_legal_fp'
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %1 = select <vscale x 2 x i1> undef, <vscale x 2 x double> undef, <vscale x 2 x double> undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %2 = select <vscale x 4 x i1> undef, <vscale x 4 x float> undef, <vscale x 4 x float> undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %3 = select <vscale x 8 x i1> undef, <vscale x 8 x half> undef, <vscale x 8 x half> undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %4 = select <vscale x 8 x i1> undef, <vscale x 8 x bfloat> undef, <vscale x 8 x bfloat> undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
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;
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%1 = select <vscale x 2 x i1> undef, <vscale x 2 x double> undef, <vscale x 2 x double> undef
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%2 = select <vscale x 4 x i1> undef, <vscale x 4 x float> undef, <vscale x 4 x float> undef
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%3 = select <vscale x 8 x i1> undef, <vscale x 8 x half> undef, <vscale x 8 x half> undef
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%4 = select <vscale x 8 x i1> undef, <vscale x 8 x bfloat> undef, <vscale x 8 x bfloat> undef
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ret void
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}
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; Check select for an illegal FP vector
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define <vscale x 8 x float> @sel_nxv8f32() {
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; CHECK-LABEL: 'sel_nxv8f32'
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; CHECK-NEXT: Cost Model: Found costs of 2 for: %res = select <vscale x 8 x i1> undef, <vscale x 8 x float> undef, <vscale x 8 x float> undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <vscale x 8 x float> %res
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;
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%res = select <vscale x 8 x i1> undef, <vscale x 8 x float> undef, <vscale x 8 x float> undef
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ret <vscale x 8 x float> %res
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}
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; Check select for a legal predicate vector
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define void @sel_legal_pred() {
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; CHECK-LABEL: 'sel_legal_pred'
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %1 = select <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %2 = select <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %3 = select <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef
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; CHECK-NEXT: Cost Model: Found costs of 1 for: %4 = select <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
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;
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%1 = select <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef
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%2 = select <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef
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%3 = select <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef
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%4 = select <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef
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ret void
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}
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; Check select for an illegal predicate vector
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define <vscale x 32 x i1> @sel_nxv32i1() {
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; CHECK-LABEL: 'sel_nxv32i1'
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; CHECK-NEXT: Cost Model: Found costs of 2 for: %res = select <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret <vscale x 32 x i1> %res
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;
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%res = select <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef
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ret <vscale x 32 x i1> %res
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}
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define void @uscmp() {
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; CHECK-LABEL: 'uscmp'
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; CHECK-NEXT: Cost Model: Found costs of 4 for: %uv16i8 = call <vscale x 16 x i8> @llvm.ucmp.nxv16i8.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
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; CHECK-NEXT: Cost Model: Found costs of 4 for: %uv8i16 = call <vscale x 8 x i16> @llvm.ucmp.nxv8i16.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
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; CHECK-NEXT: Cost Model: Found costs of 4 for: %uv4i32 = call <vscale x 4 x i32> @llvm.ucmp.nxv4i32.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
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; CHECK-NEXT: Cost Model: Found costs of 4 for: %uv2i64 = call <vscale x 2 x i64> @llvm.ucmp.nxv2i64.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
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; CHECK-NEXT: Cost Model: Found costs of 4 for: %sv16i8 = call <vscale x 16 x i8> @llvm.scmp.nxv16i8.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
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; CHECK-NEXT: Cost Model: Found costs of 4 for: %sv8i16 = call <vscale x 8 x i16> @llvm.scmp.nxv8i16.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
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; CHECK-NEXT: Cost Model: Found costs of 4 for: %sv4i32 = call <vscale x 4 x i32> @llvm.scmp.nxv4i32.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
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; CHECK-NEXT: Cost Model: Found costs of 4 for: %sv2i64 = call <vscale x 2 x i64> @llvm.scmp.nxv2i64.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
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; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
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;
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%uv16i8 = call <vscale x 16 x i8> @llvm.ucmp(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
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%uv8i16 = call <vscale x 8 x i16> @llvm.ucmp(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
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%uv4i32 = call <vscale x 4 x i32> @llvm.ucmp(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
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%uv2i64 = call <vscale x 2 x i64> @llvm.ucmp(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
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%sv16i8 = call <vscale x 16 x i8> @llvm.scmp(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
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%sv8i16 = call <vscale x 8 x i16> @llvm.scmp(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
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%sv4i32 = call <vscale x 4 x i32> @llvm.scmp(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
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%sv2i64 = call <vscale x 2 x i64> @llvm.scmp(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
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ret void
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}
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attributes #0 = { "target-features"="+sve,+bf16" }
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