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88 lines
1.8 KiB
LLVM
88 lines
1.8 KiB
LLVM
; RUN: opt -mtriple amdgcn-- -passes='print<uniformity>' -disable-output %s 2>&1 | FileCheck %s
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; Alpha (div.uni)
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; | \
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; Entry \
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; (div.cond)\
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; / \ \
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; B0 B3 |
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; | | |
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; B1 B4<-+
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; | |
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; B2 B5
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; / | |
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; / | B501
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; / | |
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; B201->B202 B502
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; \ /
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; B6 (phi: divergent)
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;
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;
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; CHECK-LABEL: 'test_ctrl_divergence':
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; CHECK-LABEL: BLOCK Entry
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; CHECK: DIVERGENT: %div.cond = icmp eq i32 %tid, 0
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; CHECK: DIVERGENT: br i1 %div.cond, label %B3, label %B0
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;
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; CHECK-LABEL: BLOCK B6
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; CHECK: DIVERGENT: %div_a = phi i32 [ %a0, %B202 ], [ %a1, %B502 ]
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; CHECK: DIVERGENT: %div_b = phi i32 [ %b0, %B202 ], [ %b1, %B502 ]
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; CHECK: DIVERGENT: %div_c = phi i32 [ %c0, %B202 ], [ %c1, %B502 ]
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define amdgpu_kernel void @test_ctrl_divergence(i32 %a, i32 %b, i32 %c, i32 %d) {
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Alpha:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%div.uni = icmp eq i32 %a, 0
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br i1 %div.uni, label %Entry, label %B4
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Entry:
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%div.cond = icmp eq i32 %tid, 0
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br i1 %div.cond, label %B3, label %B0 ; divergent branch
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B0:
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br label %B1
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B1:
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br label %B2
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B2:
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%a0 = add i32 %a, 1
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%b0 = add i32 %b, 2
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%c0 = add i32 %c, 3
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br i1 %div.uni, label %B201, label %B202
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B201:
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br label %B202
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B202:
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br label %B6
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B3:
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br label %B4
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B4:
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%a1 = add i32 %a, 10
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%b1 = add i32 %b, 20
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%c1 = add i32 %c, 30
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br i1 %div.uni, label %B5, label %B501
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B5:
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br label %B501
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B501:
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br label %B502
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B502:
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br label %B6
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B6:
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%div_a = phi i32 [%a0, %B202], [%a1, %B502]
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%div_b = phi i32 [%b0, %B202], [%b1, %B502]
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%div_c = phi i32 [%c0, %B202], [%c1, %B502]
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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attributes #0 = {nounwind readnone }
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