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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

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LLVM
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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -mtriple=aarch64 -global-isel -stop-after=irtranslator -verify-machineinstrs -o - %s | FileCheck %s
define [9 x i64] @callee_sret_demotion() {
; CHECK-LABEL: name: callee_sret_demotion
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $x8
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x8
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
; CHECK-NEXT: G_STORE [[C]](i64), [[COPY]](p0) :: (store (i64))
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C1]](i64)
; CHECK-NEXT: G_STORE [[C]](i64), [[PTR_ADD]](p0) :: (store (i64))
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C2]](i64)
; CHECK-NEXT: G_STORE [[C]](i64), [[PTR_ADD1]](p0) :: (store (i64))
; CHECK-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 24
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C3]](i64)
; CHECK-NEXT: G_STORE [[C]](i64), [[PTR_ADD2]](p0) :: (store (i64))
; CHECK-NEXT: [[C4:%[0-9]+]]:_(i64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C4]](i64)
; CHECK-NEXT: G_STORE [[C]](i64), [[PTR_ADD3]](p0) :: (store (i64))
; CHECK-NEXT: [[C5:%[0-9]+]]:_(i64) = G_CONSTANT i64 40
; CHECK-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C5]](i64)
; CHECK-NEXT: G_STORE [[C]](i64), [[PTR_ADD4]](p0) :: (store (i64))
; CHECK-NEXT: [[C6:%[0-9]+]]:_(i64) = G_CONSTANT i64 48
; CHECK-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C6]](i64)
; CHECK-NEXT: G_STORE [[C]](i64), [[PTR_ADD5]](p0) :: (store (i64))
; CHECK-NEXT: [[C7:%[0-9]+]]:_(i64) = G_CONSTANT i64 56
; CHECK-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C7]](i64)
; CHECK-NEXT: G_STORE [[C]](i64), [[PTR_ADD6]](p0) :: (store (i64))
; CHECK-NEXT: [[C8:%[0-9]+]]:_(i64) = G_CONSTANT i64 64
; CHECK-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C8]](i64)
; CHECK-NEXT: G_STORE [[C]](i64), [[PTR_ADD7]](p0) :: (store (i64))
; CHECK-NEXT: RET_ReallyLR
ret [9 x i64] zeroinitializer
}
define i64 @caller() {
; CHECK-LABEL: name: caller
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
; CHECK-NEXT: $x8 = COPY [[FRAME_INDEX]](p0)
; CHECK-NEXT: BL @callee_sret_demotion, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x8
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i64) = G_LOAD [[FRAME_INDEX]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C]](i64)
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C1]](i64)
; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD1]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 24
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C2]](i64)
; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD2]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C3]](i64)
; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD3]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C4:%[0-9]+]]:_(i64) = G_CONSTANT i64 40
; CHECK-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C4]](i64)
; CHECK-NEXT: [[LOAD5:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD4]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C5:%[0-9]+]]:_(i64) = G_CONSTANT i64 48
; CHECK-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C5]](i64)
; CHECK-NEXT: [[LOAD6:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD5]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C6:%[0-9]+]]:_(i64) = G_CONSTANT i64 56
; CHECK-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C6]](i64)
; CHECK-NEXT: [[LOAD7:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD6]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C7:%[0-9]+]]:_(i64) = G_CONSTANT i64 64
; CHECK-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C7]](i64)
; CHECK-NEXT: [[LOAD8:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD7]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: $x0 = COPY [[LOAD4]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%res = call [9 x i64] @callee_sret_demotion()
%val = extractvalue [9 x i64] %res, 4
ret i64 %val
}
define i64 @caller_tail() {
; CHECK-LABEL: name: caller_tail
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
; CHECK-NEXT: $x8 = COPY [[FRAME_INDEX]](p0)
; CHECK-NEXT: BL @callee_sret_demotion, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x8
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i64) = G_LOAD [[FRAME_INDEX]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C]](i64)
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C1]](i64)
; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD1]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 24
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C2]](i64)
; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD2]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(i64) = G_CONSTANT i64 32
; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C3]](i64)
; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD3]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C4:%[0-9]+]]:_(i64) = G_CONSTANT i64 40
; CHECK-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C4]](i64)
; CHECK-NEXT: [[LOAD5:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD4]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C5:%[0-9]+]]:_(i64) = G_CONSTANT i64 48
; CHECK-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C5]](i64)
; CHECK-NEXT: [[LOAD6:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD5]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C6:%[0-9]+]]:_(i64) = G_CONSTANT i64 56
; CHECK-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C6]](i64)
; CHECK-NEXT: [[LOAD7:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD6]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: [[C7:%[0-9]+]]:_(i64) = G_CONSTANT i64 64
; CHECK-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C7]](i64)
; CHECK-NEXT: [[LOAD8:%[0-9]+]]:_(i64) = G_LOAD [[PTR_ADD7]](p0) :: (load (i64) from %stack.0)
; CHECK-NEXT: $x0 = COPY [[LOAD4]](i64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%res = tail call [9 x i64] @callee_sret_demotion()
%val = extractvalue [9 x i64] %res, 4
ret i64 %val
}
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