TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/GlobalISel/combine-umulh-to-lshr.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s

---
name:            mul_to_lshr
alignment:       4
tracksRegLiveness: true
frameInfo:
  maxAlignment:    1
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $x0
    ; CHECK-LABEL: name: mul_to_lshr
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 61
    ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY]], [[C]](s64)
    ; CHECK-NEXT: $x0 = COPY [[LSHR]](s64)
    %0:_(s64) = COPY $x0
    %1:_(s64) = G_CONSTANT i64 8
    %2:_(s64) = G_UMULH %0, %1(s64)
    $x0 = COPY %2(s64)
...
---
name:            mul_to_lshr_vector
alignment:       4
tracksRegLiveness: true
frameInfo:
  maxAlignment:    1
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: mul_to_lshr_vector
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 29
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
    ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(<4 x s32>) = G_LSHR [[COPY]], [[BUILD_VECTOR]](<4 x s32>)
    ; CHECK-NEXT: $q0 = COPY [[LSHR]](<4 x s32>)
    %0:_(<4 x s32>) = COPY $q0
    %1:_(s32) = G_CONSTANT i32 8
    %bv:_(<4 x s32>) = G_BUILD_VECTOR %1, %1, %1, %1
    %2:_(<4 x s32>) = G_UMULH %0, %bv(<4 x s32>)
    $q0 = COPY %2(<4 x s32>)
...
---
name:            mul_to_lshr_vector_out_of_range_shift
alignment:       4
tracksRegLiveness: true
frameInfo:
  maxAlignment:    1
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: mul_to_lshr_vector_out_of_range_shift
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: %bv:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
    ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(<4 x s32>) = G_UMULH [[COPY]], %bv
    ; CHECK-NEXT: $q0 = COPY [[UMULH]](<4 x s32>)
    %0:_(<4 x s32>) = COPY $q0
    %1:_(s32) = G_CONSTANT i32 1
    %bv:_(<4 x s32>) = G_BUILD_VECTOR %1, %1, %1, %1
    %2:_(<4 x s32>) = G_UMULH %0, %bv(<4 x s32>)
    $q0 = COPY %2(<4 x s32>)
...
---
name:            mul_to_lshr_out_of_range_shift
alignment:       4
tracksRegLiveness: true
frameInfo:
  maxAlignment:    1
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $x0
    ; CHECK-LABEL: name: mul_to_lshr_out_of_range_shift
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s64) = G_UMULH [[COPY]], [[C]]
    ; CHECK-NEXT: $x0 = COPY [[UMULH]](s64)
    %0:_(s64) = COPY $x0
    %1:_(s64) = G_CONSTANT i64 1
    %2:_(s64) = G_UMULH %0, %1(s64)
    $x0 = COPY %2(s64)
...
---
name:            mul_to_lshr_vector_nonuniform_const
alignment:       4
tracksRegLiveness: true
frameInfo:
  maxAlignment:    1
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: mul_to_lshr_vector_nonuniform_const
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 28
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 27
    ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 26
    ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 29
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C3]](s32), [[C]](s32), [[C1]](s32), [[C2]](s32)
    ; CHECK-NEXT: %mulh:_(<4 x s32>) = G_LSHR [[COPY]], [[BUILD_VECTOR]](<4 x s32>)
    ; CHECK-NEXT: $q0 = COPY %mulh(<4 x s32>)
    %0:_(<4 x s32>) = COPY $q0
    %cst1:_(s32) = G_CONSTANT i32 8
    %cst2:_(s32) = G_CONSTANT i32 16
    %cst3:_(s32) = G_CONSTANT i32 32
    %cst4:_(s32) = G_CONSTANT i32 64
    %bv:_(<4 x s32>) = G_BUILD_VECTOR %cst1, %cst2, %cst3, %cst4
    %mulh:_(<4 x s32>) = G_UMULH %0, %bv(<4 x s32>)
    $q0 = COPY %mulh(<4 x s32>)
...
---
name:            mul_to_lshr_vector_nonuniform_const_elt_is_one
alignment:       4
tracksRegLiveness: true
frameInfo:
  maxAlignment:    1
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: mul_to_lshr_vector_nonuniform_const_elt_is_one
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
    ; CHECK-NEXT: %cst1:_(s32) = G_CONSTANT i32 8
    ; CHECK-NEXT: %cst2:_(s32) = G_CONSTANT i32 1
    ; CHECK-NEXT: %cst3:_(s32) = G_CONSTANT i32 32
    ; CHECK-NEXT: %cst4:_(s32) = G_CONSTANT i32 64
    ; CHECK-NEXT: %bv:_(<4 x s32>) = G_BUILD_VECTOR %cst1(s32), %cst2(s32), %cst3(s32), %cst4(s32)
    ; CHECK-NEXT: %mulh:_(<4 x s32>) = G_UMULH [[COPY]], %bv
    ; CHECK-NEXT: $q0 = COPY %mulh(<4 x s32>)
    %0:_(<4 x s32>) = COPY $q0
    %cst1:_(s32) = G_CONSTANT i32 8
    %cst2:_(s32) = G_CONSTANT i32 1
    %cst3:_(s32) = G_CONSTANT i32 32
    %cst4:_(s32) = G_CONSTANT i32 64
    %bv:_(<4 x s32>) = G_BUILD_VECTOR %cst1, %cst2, %cst3, %cst4
    %mulh:_(<4 x s32>) = G_UMULH %0, %bv(<4 x s32>)
    $q0 = COPY %mulh(<4 x s32>)
...