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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/GlobalISel/fold-brcond-fcmp.mir
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derek.holloway 7502bf64a4
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -run-pass=instruction-select -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s
#
# Test that we don't have to emit a CSINC when emitting a G_FCMP being used by
# a G_BRCOND.
#
# Condition codes which require more than one instruction should have two Bccs.
...
---
name: oeq
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: oeq
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(oeq), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: ogt
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: ogt
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 12, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(ogt), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: oge
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: oge
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 10, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(oge), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: olt
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: olt
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 4, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(olt), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: ole
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: ole
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 9, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(ole), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: one
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: one
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 4, %bb.2, implicit $nzcv
; CHECK-NEXT: Bcc 12, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(one), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: ord
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: ord
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 7, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(ord), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: uno
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: uno
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 6, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(uno), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: ueq
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: ueq
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
; CHECK-NEXT: Bcc 6, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(ueq), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: ugt
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: ugt
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 8, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(ugt), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: uge
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: uge
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 5, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(uge), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: ult
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: ult
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(ult), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: ule
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: ule
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 13, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(ule), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1
...
---
name: une
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: une
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cmp_lhs:fpr32 = COPY $s0
; CHECK-NEXT: %cmp_rhs:fpr32 = COPY $s1
; CHECK-NEXT: nofpexcept FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv, implicit $fpcr
; CHECK-NEXT: Bcc 1, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: $s0 = COPY %cmp_lhs
; CHECK-NEXT: RET_ReallyLR implicit $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $s1 = COPY %cmp_rhs
; CHECK-NEXT: RET_ReallyLR implicit $s1
bb.0:
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
%cmp_lhs:fpr(s32) = COPY $s0
%cmp_rhs:fpr(s32) = COPY $s1
%fcmp:gpr(s32) = G_FCMP floatpred(une), %cmp_lhs(s32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
$s0 = COPY %cmp_lhs
RET_ReallyLR implicit $s0
bb.2:
$s1 = COPY %cmp_rhs
RET_ReallyLR implicit $s1