derek.holloway
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95 lines
2.9 KiB
YAML
95 lines
2.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=aarch64 -run-pass=instruction-select -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s
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#
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# Verify that we can fold compares into integer selects.
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#
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# This is an integer version of fold-fp-select.mir.
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#
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...
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---
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name: eq
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: eq
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32sp = COPY $w0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
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; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 0, 0, implicit-def $nzcv
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; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY2]], [[COPY1]], 0, implicit $nzcv
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; CHECK-NEXT: $w0 = COPY [[CSELWr]]
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:gpr(s32) = COPY $w0
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%1:gpr(s32) = COPY $w1
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%2:gpr(s32) = G_CONSTANT i32 0
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%5:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2
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%4:gpr(s32) = G_SELECT %5, %2, %1
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$w0 = COPY %4(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: using_fcmp
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $s0, $w0, $w1
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; CHECK-LABEL: name: using_fcmp
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; CHECK: liveins: $s0, $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $s0
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
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; CHECK-NEXT: nofpexcept FCMPSri [[COPY1]], implicit-def $nzcv, implicit $fpcr
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; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY2]], [[COPY]], 0, implicit $nzcv
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; CHECK-NEXT: $w0 = COPY [[CSELWr]]
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%1:gpr(s32) = COPY $w1
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%2:fpr(s32) = COPY $s0
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%3:fpr(s32) = G_FCONSTANT float 0.000000e+00
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%6:gpr(s32) = G_CONSTANT i32 0
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%7:gpr(s32) = G_FCMP floatpred(oeq), %2(s32), %3
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%5:gpr(s32) = G_SELECT %7, %6, %1
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$w0 = COPY %5(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: csinc
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: csinc
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
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; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
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; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY]], $wzr, 0, implicit $nzcv
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; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:gpr(s32) = COPY $w0
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%1:gpr(s32) = COPY $w1
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%2:gpr(s32) = G_CONSTANT i32 1
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%5:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2
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%4:gpr(s32) = G_SELECT %5, %0, %2
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$w0 = COPY %4(s32)
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RET_ReallyLR implicit $w0
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...
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