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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-shr-and.mir
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derek.holloway 7502bf64a4
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
# Check that we can fold a G_ASHR/G_LSHR fed by a G_AND into a G_SBFX/G_UBFX.
---
name: mask_extract_unsigned_32
legalized: true
body: |
bb.0.entry:
; CHECK-LABEL: name: mask_extract_unsigned_32
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; CHECK-NEXT: [[UBFX:%[0-9]+]]:_(s32) = G_UBFX [[COPY]], [[C]](s32), [[C]]
; CHECK-NEXT: $w0 = COPY [[UBFX]](s32)
%0:_(s32) = COPY $w0
%1:_(s32) = G_CONSTANT i32 12
%2:_(s32) = G_CONSTANT i32 2
%3:_(s32) = G_AND %0, %1
%4:_(s32) = G_LSHR %3, %2
$w0 = COPY %4(s32)
...
---
name: mask_extract_unsigned_64
legalized: true
body: |
bb.0.entry:
; CHECK-LABEL: name: mask_extract_unsigned_64
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
; CHECK-NEXT: [[UBFX:%[0-9]+]]:_(s64) = G_UBFX [[COPY]], [[C]](s64), [[C1]]
; CHECK-NEXT: $x0 = COPY [[UBFX]](s64)
%0:_(s64) = COPY $x0
%1:_(s64) = G_CONSTANT i64 1080863910568919040
%2:_(s64) = G_CONSTANT i64 56
%3:_(s64) = G_AND %0, %1
%4:_(s64) = G_LSHR %3, %2
$x0 = COPY %4(s64)
...
---
name: no_mask_extract_unsigned_128
legalized: true
body: |
bb.0.entry:
; CHECK-LABEL: name: no_mask_extract_unsigned_128
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $q0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 1080863910568919040
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 56
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s128) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s128) = G_LSHR [[AND]], [[C1]](s128)
; CHECK-NEXT: $q0 = COPY [[LSHR]](s128)
%0:_(s128) = COPY $q0
%1:_(s128) = G_CONSTANT i128 1080863910568919040
%2:_(s128) = G_CONSTANT i128 56
%3:_(s128) = G_AND %0, %1
%4:_(s128) = G_LSHR %3, %2
$q0 = COPY %4(s128)
...
---
name: mask_extract_asr
legalized: true
body: |
bb.0.entry:
; CHECK-LABEL: name: mask_extract_asr
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 29
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; CHECK-NEXT: [[UBFX:%[0-9]+]]:_(s32) = G_UBFX [[COPY]], [[C]](s32), [[C1]]
; CHECK-NEXT: $w0 = COPY [[UBFX]](s32)
%0:_(s32) = COPY $w0
%1:_(s32) = G_CONSTANT i32 1610612736
%2:_(s32) = G_CONSTANT i32 29
%3:_(s32) = G_AND %0, %1
%4:_(s32) = G_ASHR %3, %2
$w0 = COPY %4(s32)
...
---
name: no_mask_extract_asr
legalized: true
body: |
bb.0.entry:
; CHECK-LABEL: name: no_mask_extract_asr
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1073741824
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 30
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND]], [[C1]](s32)
; CHECK-NEXT: $w0 = COPY [[ASHR]](s32)
%0:_(s32) = COPY $w0
%1:_(s32) = G_CONSTANT i32 3221225472
%2:_(s32) = G_CONSTANT i32 30
%3:_(s32) = G_AND %0, %1
%4:_(s32) = G_ASHR %3, %2
$w0 = COPY %4(s32)
...
---
name: mask_extract_signed_nonneg
legalized: true
body: |
bb.0.entry:
; CHECK-LABEL: name: mask_extract_signed_nonneg
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 29
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; CHECK-NEXT: [[UBFX:%[0-9]+]]:_(s32) = G_UBFX [[COPY]], [[C]](s32), [[C1]]
; CHECK-NEXT: $w0 = COPY [[UBFX]](s32)
%0:_(s32) = COPY $w0
%1:_(s32) = G_CONSTANT i32 2147483647
%2:_(s32) = G_CONSTANT i32 29
%3:_(s32) = G_AND %0, %1
%4:_(s32) = G_ASHR %3, %2
$w0 = COPY %4(s32)
...
---
name: no_mask_extract_large_shift
legalized: true
body: |
bb.0.entry:
; CHECK-LABEL: name: no_mask_extract_large_shift
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 33
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32)
; CHECK-NEXT: $w0 = COPY [[LSHR]](s32)
%0:_(s32) = COPY $w0
%1:_(s32) = G_CONSTANT i32 12
%2:_(s32) = G_CONSTANT i32 33
%3:_(s32) = G_AND %0, %1
%4:_(s32) = G_LSHR %3, %2
$w0 = COPY %4(s32)
...
---
name: no_mask_extract_negative_shift
legalized: true
body: |
bb.0.entry:
; CHECK-LABEL: name: no_mask_extract_negative_shift
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32)
; CHECK-NEXT: $w0 = COPY [[LSHR]](s32)
%0:_(s32) = COPY $w0
%1:_(s32) = G_CONSTANT i32 12
%2:_(s32) = G_CONSTANT i32 -1
%3:_(s32) = G_AND %0, %1
%4:_(s32) = G_LSHR %3, %2
$w0 = COPY %4(s32)
...
---
name: no_mask_extract_disjoint
legalized: true
body: |
bb.0.entry:
; CHECK-LABEL: name: no_mask_extract_disjoint
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 26
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32)
; CHECK-NEXT: $w0 = COPY [[LSHR]](s32)
%0:_(s32) = COPY $w0
%1:_(s32) = G_CONSTANT i32 26
%2:_(s32) = G_CONSTANT i32 1
%3:_(s32) = G_AND %0, %1
%4:_(s32) = G_LSHR %3, %2
$w0 = COPY %4(s32)
...
---
name: no_mask_extract_extra_bits
legalized: true
body: |
bb.0.entry:
; CHECK-LABEL: name: no_mask_extract_extra_bits
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32)
; CHECK-NEXT: $w0 = COPY [[LSHR]](s32)
%0:_(s32) = COPY $w0
%1:_(s32) = G_CONSTANT i32 25
%2:_(s32) = G_CONSTANT i32 2
%3:_(s32) = G_AND %0, %1
%4:_(s32) = G_LSHR %3, %2
$w0 = COPY %4(s32)
...
---
name: zero_from_large_shift
legalized: true
body: |
bb.1.entry:
; CHECK-LABEL: name: zero_from_large_shift
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: $x0 = COPY [[C]](s64)
%2:_(s32) = COPY $w0
%1:_(s8) = G_TRUNC %2:_(s32)
%3:_(s8) = G_ASSERT_ZEXT %1:_, 1
%5:_(s64) = G_CONSTANT i64 1
%7:_(s64) = G_ANYEXT %3:_(s8)
%4:_(s64) = G_AND %7:_, %5:_
%6:_(s64) = G_LSHR %4:_, %5:_(s64)
$x0 = COPY %6:_(s64)
...