derek.holloway
7502bf64a4
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95 lines
4.7 KiB
LLVM
95 lines
4.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -mtriple=aarch64-- -mcpu=falkor -mattr=+lse -O0 -aarch64-enable-atomic-cfg-tidy=0 -stop-after=irtranslator -global-isel -verify-machineinstrs %s -o - | FileCheck %s
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define i32 @atomicrmw_volatile(ptr %ptr) {
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; CHECK-LABEL: name: atomicrmw_volatile
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
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; CHECK-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(i32) = G_ATOMICRMW_ADD [[COPY]](p0), [[C]] :: (volatile load store monotonic (i32) on %ir.ptr)
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; CHECK-NEXT: $w0 = COPY [[ATOMICRMW_ADD]](i32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%oldval = atomicrmw volatile add ptr %ptr, i32 1 monotonic
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ret i32 %oldval
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}
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define i32 @atomicrmw_falkor(ptr %ptr) {
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; CHECK-LABEL: name: atomicrmw_falkor
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
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; CHECK-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(i32) = G_ATOMICRMW_ADD [[COPY]](p0), [[C]] :: ("aarch64-strided-access" load store monotonic (i32) on %ir.ptr)
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; CHECK-NEXT: $w0 = COPY [[ATOMICRMW_ADD]](i32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%oldval = atomicrmw add ptr %ptr, i32 1 monotonic, !falkor.strided.access !0
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ret i32 %oldval
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}
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define i32 @atomicrmw_volatile_falkor(ptr %ptr) {
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; CHECK-LABEL: name: atomicrmw_volatile_falkor
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
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; CHECK-NEXT: [[ATOMICRMW_ADD:%[0-9]+]]:_(i32) = G_ATOMICRMW_ADD [[COPY]](p0), [[C]] :: (volatile "aarch64-strided-access" load store monotonic (i32) on %ir.ptr)
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; CHECK-NEXT: $w0 = COPY [[ATOMICRMW_ADD]](i32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%oldval = atomicrmw volatile add ptr %ptr, i32 1 monotonic, !falkor.strided.access !0
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ret i32 %oldval
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}
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define i32 @cmpxchg_volatile(ptr %addr) {
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; CHECK-LABEL: name: cmpxchg_volatile
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
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; CHECK-NEXT: [[ATOMIC_CMPXCHG_WITH_SUCCESS:%[0-9]+]]:_(i32), [[ATOMIC_CMPXCHG_WITH_SUCCESS1:%[0-9]+]]:_(i1) = G_ATOMIC_CMPXCHG_WITH_SUCCESS [[COPY]](p0), [[C]], [[C1]] :: (volatile load store monotonic monotonic (i32) on %ir.addr)
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; CHECK-NEXT: $w0 = COPY [[ATOMIC_CMPXCHG_WITH_SUCCESS]](i32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%val_success = cmpxchg volatile ptr %addr, i32 0, i32 1 monotonic monotonic
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%value_loaded = extractvalue { i32, i1 } %val_success, 0
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ret i32 %value_loaded
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}
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define i32 @cmpxchg_falkor(ptr %addr) {
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; CHECK-LABEL: name: cmpxchg_falkor
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
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; CHECK-NEXT: [[ATOMIC_CMPXCHG_WITH_SUCCESS:%[0-9]+]]:_(i32), [[ATOMIC_CMPXCHG_WITH_SUCCESS1:%[0-9]+]]:_(i1) = G_ATOMIC_CMPXCHG_WITH_SUCCESS [[COPY]](p0), [[C]], [[C1]] :: ("aarch64-strided-access" load store monotonic monotonic (i32) on %ir.addr)
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; CHECK-NEXT: $w0 = COPY [[ATOMIC_CMPXCHG_WITH_SUCCESS]](i32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%val_success = cmpxchg ptr %addr, i32 0, i32 1 monotonic monotonic, !falkor.strided.access !0
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%value_loaded = extractvalue { i32, i1 } %val_success, 0
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ret i32 %value_loaded
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}
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define i32 @cmpxchg_volatile_falkor(ptr %addr) {
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; CHECK-LABEL: name: cmpxchg_volatile_falkor
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
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; CHECK-NEXT: [[ATOMIC_CMPXCHG_WITH_SUCCESS:%[0-9]+]]:_(i32), [[ATOMIC_CMPXCHG_WITH_SUCCESS1:%[0-9]+]]:_(i1) = G_ATOMIC_CMPXCHG_WITH_SUCCESS [[COPY]](p0), [[C]], [[C1]] :: (volatile "aarch64-strided-access" load store monotonic monotonic (i32) on %ir.addr)
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; CHECK-NEXT: $w0 = COPY [[ATOMIC_CMPXCHG_WITH_SUCCESS]](i32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%val_success = cmpxchg volatile ptr %addr, i32 0, i32 1 monotonic monotonic, !falkor.strided.access !0
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%value_loaded = extractvalue { i32, i1 } %val_success, 0
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ret i32 %value_loaded
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}
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!0 = !{}
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