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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-bitcast.ll
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186 lines
7.8 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
; RUN: llc -O0 -mtriple=aarch64-apple-ios -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s
; Check that we don't invalidate the vreg map.
; This test is brittle: the invalidation only triggers when we grow the map.
define i32 @test_bitcast_invalid_vreg() {
; CHECK-LABEL: name: test_bitcast_invalid_vreg
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 1
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i32) = G_CONSTANT i32 2
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i32) = G_CONSTANT i32 3
; CHECK-NEXT: [[C3:%[0-9]+]]:_(i32) = G_CONSTANT i32 4
; CHECK-NEXT: [[C4:%[0-9]+]]:_(i32) = G_CONSTANT i32 5
; CHECK-NEXT: [[C5:%[0-9]+]]:_(i32) = G_CONSTANT i32 6
; CHECK-NEXT: [[C6:%[0-9]+]]:_(i32) = G_CONSTANT i32 7
; CHECK-NEXT: [[C7:%[0-9]+]]:_(i32) = G_CONSTANT i32 8
; CHECK-NEXT: [[C8:%[0-9]+]]:_(i32) = G_CONSTANT i32 9
; CHECK-NEXT: [[C9:%[0-9]+]]:_(i32) = G_CONSTANT i32 10
; CHECK-NEXT: [[C10:%[0-9]+]]:_(i32) = G_CONSTANT i32 11
; CHECK-NEXT: [[C11:%[0-9]+]]:_(i32) = G_CONSTANT i32 12
; CHECK-NEXT: [[C12:%[0-9]+]]:_(i32) = G_CONSTANT i32 13
; CHECK-NEXT: [[C13:%[0-9]+]]:_(i32) = G_CONSTANT i32 14
; CHECK-NEXT: [[C14:%[0-9]+]]:_(i32) = G_CONSTANT i32 15
; CHECK-NEXT: [[C15:%[0-9]+]]:_(i32) = G_CONSTANT i32 16
; CHECK-NEXT: [[C16:%[0-9]+]]:_(i32) = G_CONSTANT i32 17
; CHECK-NEXT: [[C17:%[0-9]+]]:_(i32) = G_CONSTANT i32 18
; CHECK-NEXT: [[C18:%[0-9]+]]:_(i32) = G_CONSTANT i32 19
; CHECK-NEXT: [[C19:%[0-9]+]]:_(i32) = G_CONSTANT i32 20
; CHECK-NEXT: [[C20:%[0-9]+]]:_(i32) = G_CONSTANT i32 21
; CHECK-NEXT: [[C21:%[0-9]+]]:_(i32) = G_CONSTANT i32 22
; CHECK-NEXT: [[C22:%[0-9]+]]:_(i32) = G_CONSTANT i32 23
; CHECK-NEXT: [[C23:%[0-9]+]]:_(i32) = G_CONSTANT i32 24
; CHECK-NEXT: [[C24:%[0-9]+]]:_(i32) = G_CONSTANT i32 25
; CHECK-NEXT: [[C25:%[0-9]+]]:_(i32) = G_CONSTANT i32 26
; CHECK-NEXT: [[C26:%[0-9]+]]:_(i32) = G_CONSTANT i32 27
; CHECK-NEXT: [[C27:%[0-9]+]]:_(i32) = G_CONSTANT i32 28
; CHECK-NEXT: [[C28:%[0-9]+]]:_(i32) = G_CONSTANT i32 29
; CHECK-NEXT: [[C29:%[0-9]+]]:_(i32) = G_CONSTANT i32 30
; CHECK-NEXT: [[C30:%[0-9]+]]:_(i32) = G_CONSTANT i32 100
; CHECK-NEXT: [[C31:%[0-9]+]]:_(i32) = G_CONSTANT i32 3
; CHECK-NEXT: [[C32:%[0-9]+]]:_(i32) = G_CONSTANT i32 7
; CHECK-NEXT: [[C33:%[0-9]+]]:_(i32) = G_CONSTANT i32 11
; CHECK-NEXT: [[C34:%[0-9]+]]:_(i32) = G_CONSTANT i32 15
; CHECK-NEXT: [[C35:%[0-9]+]]:_(i32) = G_CONSTANT i32 19
; CHECK-NEXT: [[C36:%[0-9]+]]:_(i32) = G_CONSTANT i32 23
; CHECK-NEXT: [[C37:%[0-9]+]]:_(i32) = G_CONSTANT i32 27
; CHECK-NEXT: [[C38:%[0-9]+]]:_(i32) = G_CONSTANT i32 31
; CHECK-NEXT: [[C39:%[0-9]+]]:_(i32) = G_CONSTANT i32 35
; CHECK-NEXT: [[C40:%[0-9]+]]:_(i32) = G_CONSTANT i32 39
; CHECK-NEXT: [[C41:%[0-9]+]]:_(i32) = G_CONSTANT i32 43
; CHECK-NEXT: [[C42:%[0-9]+]]:_(i32) = G_CONSTANT i32 47
; CHECK-NEXT: [[C43:%[0-9]+]]:_(i32) = G_CONSTANT i32 51
; CHECK-NEXT: [[C44:%[0-9]+]]:_(i32) = G_CONSTANT i32 55
; CHECK-NEXT: [[C45:%[0-9]+]]:_(i32) = G_CONSTANT i32 59
; CHECK-NEXT: [[C46:%[0-9]+]]:_(i32) = G_CONSTANT i32 60
; CHECK-NEXT: [[CONSTANT_FOLD_BARRIER:%[0-9]+]]:_(i32) = G_CONSTANT_FOLD_BARRIER [[C30]]
; CHECK-NEXT: $w0 = COPY [[CONSTANT_FOLD_BARRIER]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%tmp0 = add i32 1, 2
%tmp1 = add i32 3, 4
%tmp2 = add i32 5, 6
%tmp3 = add i32 7, 8
%tmp4 = add i32 9, 10
%tmp5 = add i32 11, 12
%tmp6 = add i32 13, 14
%tmp7 = add i32 15, 16
%tmp8 = add i32 17, 18
%tmp9 = add i32 19, 20
%tmp10 = add i32 21, 22
%tmp11 = add i32 23, 24
%tmp12 = add i32 25, 26
%tmp13 = add i32 27, 28
%tmp14 = add i32 29, 30
%tmp15 = add i32 30, 30
; At this point we mapped 46 values. The 'i32 100' constant will grow the map.
%res = bitcast i32 100 to i32
ret i32 %res
}
; Check that bf16 <=> fp16 bitcast are valid
define bfloat @bitcast_f16_bf16(half %a) {
; CHECK-LABEL: name: bitcast_f16_bf16
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $h0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(f16) = COPY $h0
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(bf16) = G_BITCAST [[COPY]](f16)
; CHECK-NEXT: $h0 = COPY [[BITCAST]](bf16)
; CHECK-NEXT: RET_ReallyLR implicit $h0
%b = bitcast half %a to bfloat
ret bfloat %b
}
define half @bitcast_bf16_f16(bfloat %a) {
; CHECK-LABEL: name: bitcast_bf16_f16
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $h0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(bf16) = COPY $h0
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(f16) = G_BITCAST [[COPY]](bf16)
; CHECK-NEXT: $h0 = COPY [[BITCAST]](f16)
; CHECK-NEXT: RET_ReallyLR implicit $h0
%b = bitcast bfloat %a to half
ret half %b
}
define bfloat @bitcast_i16_bf16(i16 %a) {
; CHECK-LABEL: name: bitcast_i16_bf16
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(i32) = COPY $w0
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[COPY]](i32)
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(bf16) = G_BITCAST [[TRUNC]](i16)
; CHECK-NEXT: $h0 = COPY [[BITCAST]](bf16)
; CHECK-NEXT: RET_ReallyLR implicit $h0
%b = bitcast i16 %a to bfloat
ret bfloat %b
}
define i16 @bitcast_bf16_i16(bfloat %a) {
; CHECK-LABEL: name: bitcast_bf16_i16
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $h0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(bf16) = COPY $h0
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(i16) = G_BITCAST [[COPY]](bf16)
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[BITCAST]](i16)
; CHECK-NEXT: $w0 = COPY [[ANYEXT]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%b = bitcast bfloat %a to i16
ret i16 %b
}
define <4 x bfloat> @bitcast_v4f16_v4bf16(<4 x half> %a) {
; CHECK-LABEL: name: bitcast_v4f16_v4bf16
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $d0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x f16>) = COPY $d0
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<4 x bf16>) = G_BITCAST [[COPY]](<4 x f16>)
; CHECK-NEXT: $d0 = COPY [[BITCAST]](<4 x bf16>)
; CHECK-NEXT: RET_ReallyLR implicit $d0
%b = bitcast <4 x half> %a to <4 x bfloat>
ret <4 x bfloat> %b
}
define <4 x half> @bitcast_v4bf16_v4f16(<4 x bfloat> %a) {
; CHECK-LABEL: name: bitcast_v4bf16_v4f16
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $d0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x bf16>) = COPY $d0
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<4 x f16>) = G_BITCAST [[COPY]](<4 x bf16>)
; CHECK-NEXT: $d0 = COPY [[BITCAST]](<4 x f16>)
; CHECK-NEXT: RET_ReallyLR implicit $d0
%b = bitcast <4 x bfloat> %a to <4 x half>
ret <4 x half> %b
}
define <4 x bfloat> @bitcast_v4i16_v4bf16(<4 x i16> %a) {
; CHECK-LABEL: name: bitcast_v4i16_v4bf16
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $d0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x i16>) = COPY $d0
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<4 x bf16>) = G_BITCAST [[COPY]](<4 x i16>)
; CHECK-NEXT: $d0 = COPY [[BITCAST]](<4 x bf16>)
; CHECK-NEXT: RET_ReallyLR implicit $d0
%b = bitcast <4 x i16> %a to <4 x bfloat>
ret <4 x bfloat> %b
}
define <4 x i16> @bitcast_v4bf16_v4i16(<4 x bfloat> %a) {
; CHECK-LABEL: name: bitcast_v4bf16_v4i16
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $d0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x bf16>) = COPY $d0
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<4 x i16>) = G_BITCAST [[COPY]](<4 x bf16>)
; CHECK-NEXT: $d0 = COPY [[BITCAST]](<4 x i16>)
; CHECK-NEXT: RET_ReallyLR implicit $d0
%b = bitcast <4 x bfloat> %a to <4 x i16>
ret <4 x i16> %b
}