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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-gep-flags.ll
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -O0 -mtriple=aarch64-linux-gnu -global-isel -stop-after=irtranslator %s -o - | FileCheck %s
define i32 @gep_nusw_nuw(ptr %ptr, i32 %idx) {
; CHECK-LABEL: name: gep_nusw_nuw
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(i64) = G_SEXT [[COPY1]](i32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i64) = nsw G_MUL [[SEXT]], [[C]]
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nusw inbounds G_PTR_ADD [[COPY]], [[MUL]](i64)
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY [[PTR_ADD]](p0)
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY2]](p0) :: (load (i32) from %ir.gep1)
; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(i64) = nuw nsw G_MUL [[SEXT]], [[C]]
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw nusw G_PTR_ADD [[COPY]], [[MUL1]](i64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw nusw G_PTR_ADD [[PTR_ADD1]], [[C1]](i64)
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[PTR_ADD2]](p0) :: (load (i32) from %ir.gep2)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i32) = G_ADD [[LOAD]], [[LOAD1]]
; CHECK-NEXT: $w0 = COPY [[ADD]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%sidx = sext i32 %idx to i64
%gep1 = getelementptr inbounds [4 x i32], ptr %ptr, i64 %sidx, i64 0
%v1 = load i32, ptr %gep1
%gep2 = getelementptr nusw nuw [4 x i32], ptr %ptr, i64 %sidx, i64 1
%v2 = load i32, ptr %gep2
%res = add i32 %v1, %v2
ret i32 %res
}
define i32 @gep_nuw(ptr %ptr, i32 %idx) {
; CHECK-LABEL: name: gep_nuw
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(i64) = G_SEXT [[COPY1]](i32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i64) = nsw G_MUL [[SEXT]], [[C]]
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nusw inbounds G_PTR_ADD [[COPY]], [[MUL]](i64)
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY [[PTR_ADD]](p0)
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY2]](p0) :: (load (i32) from %ir.gep1)
; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(i64) = nuw G_MUL [[SEXT]], [[C]]
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw G_PTR_ADD [[COPY]], [[MUL1]](i64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw G_PTR_ADD [[PTR_ADD1]], [[C1]](i64)
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[PTR_ADD2]](p0) :: (load (i32) from %ir.gep2)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i32) = G_ADD [[LOAD]], [[LOAD1]]
; CHECK-NEXT: $w0 = COPY [[ADD]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%sidx = sext i32 %idx to i64
%gep1 = getelementptr inbounds [4 x i32], ptr %ptr, i64 %sidx, i64 0
%v1 = load i32, ptr %gep1
%gep2 = getelementptr nuw [4 x i32], ptr %ptr, i64 %sidx, i64 1
%v2 = load i32, ptr %gep2
%res = add i32 %v1, %v2
ret i32 %res
}
define i32 @gep_nusw(ptr %ptr, i32 %idx) {
; CHECK-LABEL: name: gep_nusw
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(i64) = G_SEXT [[COPY1]](i32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i64) = nsw G_MUL [[SEXT]], [[C]]
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nusw inbounds G_PTR_ADD [[COPY]], [[MUL]](i64)
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY [[PTR_ADD]](p0)
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY2]](p0) :: (load (i32) from %ir.gep1)
; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(i64) = nsw G_MUL [[SEXT]], [[C]]
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nusw G_PTR_ADD [[COPY]], [[MUL1]](i64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw nusw G_PTR_ADD [[PTR_ADD1]], [[C1]](i64)
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[PTR_ADD2]](p0) :: (load (i32) from %ir.gep2)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i32) = G_ADD [[LOAD]], [[LOAD1]]
; CHECK-NEXT: $w0 = COPY [[ADD]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%sidx = sext i32 %idx to i64
%gep1 = getelementptr inbounds [4 x i32], ptr %ptr, i64 %sidx, i64 0
%v1 = load i32, ptr %gep1
%gep2 = getelementptr nusw [4 x i32], ptr %ptr, i64 %sidx, i64 1
%v2 = load i32, ptr %gep2
%res = add i32 %v1, %v2
ret i32 %res
}
define i32 @gep_none(ptr %ptr, i32 %idx) {
; CHECK-LABEL: name: gep_none
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(i64) = G_SEXT [[COPY1]](i32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i64) = nsw G_MUL [[SEXT]], [[C]]
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nusw inbounds G_PTR_ADD [[COPY]], [[MUL]](i64)
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY [[PTR_ADD]](p0)
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY2]](p0) :: (load (i32) from %ir.gep1)
; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(i64) = G_MUL [[SEXT]], [[C]]
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[MUL1]](i64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 4
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD1]], [[C1]](i64)
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[PTR_ADD2]](p0) :: (load (i32) from %ir.gep2)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i32) = G_ADD [[LOAD]], [[LOAD1]]
; CHECK-NEXT: $w0 = COPY [[ADD]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%sidx = sext i32 %idx to i64
%gep1 = getelementptr inbounds [4 x i32], ptr %ptr, i64 %sidx, i64 0
%v1 = load i32, ptr %gep1
%gep2 = getelementptr [4 x i32], ptr %ptr, i64 %sidx, i64 1
%v2 = load i32, ptr %gep2
%res = add i32 %v1, %v2
ret i32 %res
}
define i32 @gep_nusw_negative(ptr %ptr, i32 %idx) {
; CHECK-LABEL: name: gep_nusw_negative
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(i64) = G_SEXT [[COPY1]](i32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i64) = nsw G_MUL [[SEXT]], [[C]]
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nusw inbounds G_PTR_ADD [[COPY]], [[MUL]](i64)
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY [[PTR_ADD]](p0)
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(i32) = G_LOAD [[COPY2]](p0) :: (load (i32) from %ir.gep1)
; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(i64) = nsw G_MUL [[SEXT]], [[C]]
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nusw G_PTR_ADD [[COPY]], [[MUL1]](i64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 -4
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nusw G_PTR_ADD [[PTR_ADD1]], [[C1]](i64)
; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(i32) = G_LOAD [[PTR_ADD2]](p0) :: (load (i32) from %ir.gep2)
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(i32) = G_ADD [[LOAD]], [[LOAD1]]
; CHECK-NEXT: $w0 = COPY [[ADD]](i32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%sidx = sext i32 %idx to i64
%gep1 = getelementptr inbounds [4 x i32], ptr %ptr, i64 %sidx, i64 0
%v1 = load i32, ptr %gep1
%gep2 = getelementptr nusw [4 x i32], ptr %ptr, i64 %sidx, i64 -1
%v2 = load i32, ptr %gep2
%res = add i32 %v1, %v2
ret i32 %res
}
define ptr @gep_many_indices(ptr %ptr, i32 %idx) {
; CHECK-LABEL: name: gep_many_indices
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(i64) = G_SEXT [[COPY1]](i32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 108
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](i64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 12
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i64) = G_MUL [[SEXT]], [[C1]]
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[MUL]](i64)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 -4
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD1]], [[C2]](i64)
; CHECK-NEXT: $x0 = COPY [[PTR_ADD2]](p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%sidx = sext i32 %idx to i64
%gep = getelementptr {i32, [4 x [3 x i32]]}, ptr %ptr, i64 2, i32 1, i64 %sidx, i64 -1
ret ptr %gep
}
define ptr @gep_nuw_many_indices(ptr %ptr, i32 %idx) {
; CHECK-LABEL: name: gep_nuw_many_indices
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(i64) = G_SEXT [[COPY1]](i32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 108
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw G_PTR_ADD [[COPY]], [[C]](i64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 12
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i64) = nuw G_MUL [[SEXT]], [[C1]]
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw G_PTR_ADD [[PTR_ADD]], [[MUL]](i64)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 -4
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw G_PTR_ADD [[PTR_ADD1]], [[C2]](i64)
; CHECK-NEXT: $x0 = COPY [[PTR_ADD2]](p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%sidx = sext i32 %idx to i64
%gep = getelementptr nuw {i32, [4 x [3 x i32]]}, ptr %ptr, i64 2, i32 1, i64 %sidx, i64 -1
ret ptr %gep
}
define ptr @gep_nusw_many_indices(ptr %ptr, i32 %idx) {
; CHECK-LABEL: name: gep_nusw_many_indices
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(i64) = G_SEXT [[COPY1]](i32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 108
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw nusw G_PTR_ADD [[COPY]], [[C]](i64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 12
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i64) = nsw G_MUL [[SEXT]], [[C1]]
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nusw G_PTR_ADD [[PTR_ADD]], [[MUL]](i64)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 -4
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nusw G_PTR_ADD [[PTR_ADD1]], [[C2]](i64)
; CHECK-NEXT: $x0 = COPY [[PTR_ADD2]](p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%sidx = sext i32 %idx to i64
%gep = getelementptr nusw {i32, [4 x [3 x i32]]}, ptr %ptr, i64 2, i32 1, i64 %sidx, i64 -1
ret ptr %gep
}
define ptr @gep_inbounds_many_indices(ptr %ptr, i32 %idx) {
; CHECK-LABEL: name: gep_inbounds_many_indices
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(i64) = G_SEXT [[COPY1]](i32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 108
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw nusw inbounds G_PTR_ADD [[COPY]], [[C]](i64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 12
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i64) = nsw G_MUL [[SEXT]], [[C1]]
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nusw inbounds G_PTR_ADD [[PTR_ADD]], [[MUL]](i64)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 -4
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nusw inbounds G_PTR_ADD [[PTR_ADD1]], [[C2]](i64)
; CHECK-NEXT: $x0 = COPY [[PTR_ADD2]](p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%sidx = sext i32 %idx to i64
%gep = getelementptr inbounds {i32, [4 x [3 x i32]]}, ptr %ptr, i64 2, i32 1, i64 %sidx, i64 -1
ret ptr %gep
}
define ptr @gep_nuw_nusw_many_indices(ptr %ptr, i32 %idx) {
; CHECK-LABEL: name: gep_nuw_nusw_many_indices
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(i64) = G_SEXT [[COPY1]](i32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 108
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw nusw G_PTR_ADD [[COPY]], [[C]](i64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 12
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i64) = nuw nsw G_MUL [[SEXT]], [[C1]]
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw nusw G_PTR_ADD [[PTR_ADD]], [[MUL]](i64)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 -4
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw nusw G_PTR_ADD [[PTR_ADD1]], [[C2]](i64)
; CHECK-NEXT: $x0 = COPY [[PTR_ADD2]](p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%sidx = sext i32 %idx to i64
%gep = getelementptr nuw nusw {i32, [4 x [3 x i32]]}, ptr %ptr, i64 2, i32 1, i64 %sidx, i64 -1
ret ptr %gep
}
define ptr @gep_nuw_inbounds_many_indices(ptr %ptr, i32 %idx) {
; CHECK-LABEL: name: gep_nuw_inbounds_many_indices
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: liveins: $w1, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(i32) = COPY $w1
; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(i64) = G_SEXT [[COPY1]](i32)
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 108
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw nusw inbounds G_PTR_ADD [[COPY]], [[C]](i64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 12
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(i64) = nuw nsw G_MUL [[SEXT]], [[C1]]
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw nusw inbounds G_PTR_ADD [[PTR_ADD]], [[MUL]](i64)
; CHECK-NEXT: [[C2:%[0-9]+]]:_(i64) = G_CONSTANT i64 -4
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw nusw inbounds G_PTR_ADD [[PTR_ADD1]], [[C2]](i64)
; CHECK-NEXT: $x0 = COPY [[PTR_ADD2]](p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%sidx = sext i32 %idx to i64
%gep = getelementptr nuw inbounds {i32, [4 x [3 x i32]]}, ptr %ptr, i64 2, i32 1, i64 %sidx, i64 -1
ret ptr %gep
}
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