Files
TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ctls.mir
T
derek.holloway 7502bf64a4
CodeQL / Analyze (actions) (push) Canceled after 0s
CodeQL / Analyze (python) (push) Canceled after 0s
pre-commit / pre-commit (push) Canceled after 0s
Multi-Arch CI / setup (push) Canceled after 0s
Publish build_manylinux_x86_64 images / publish_build_manylinux_x86_64 (push) Canceled after 0s
Setup (Multi-Arch) / setup (push) Canceled after 0s
Multi-Arch CI / Linux::${{ fromJSON(needs.setup.outputs.linux_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubi10 image / publish_no_rocm_image_ubi10 (push) Canceled after 0s
Multi-Arch CI / Windows::${{ fromJSON(needs.setup.outputs.windows_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Multi-Arch CI / Manifest Diff (push) Canceled after 0s
TheRock Manifest Diff Report / Generate Manifest Diff Report (push) Canceled after 0s
Multi-Arch CI / CI Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_ocl_rt images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_rocgdb images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Unit Tests / Unit Tests :: ubuntu-24.04 (push) Canceled after 0s
Unit Tests / Unit Tests :: windows-2022 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_media (push) Canceled after 0s
Unit Tests / Unit Tests Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_openmpi (push) Canceled after 0s
Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

196 lines
6.1 KiB
YAML

# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=aarch64 -passes="print<gisel-value-tracking>" -filetype=null %s 2>&1 | FileCheck %s
---
name: CTLSConst8AmbigousMaxSignbitNum
body: |
bb.1:
; NOTE: Currently we do not estimate max sign bits in KnownBits,
; so while we could get more accurate here, this is currently
; not possible.
; CHECK-LABEL: name: @CTLSConst8AmbigousMaxSignbitNum
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00110000 SignBits:2
; CHECK-NEXT: %2:_ KnownBits:00001000 SignBits:4
; CHECK-NEXT: %3:_ KnownBits:00??0000 SignBits:2
; CHECK-NEXT: %4:_ KnownBits:00??1000 SignBits:2
; CHECK-NEXT: %5:_ KnownBits:00000??? SignBits:5
%0:_(s8) = COPY $b0
%1:_(s8) = G_CONSTANT i8 48
%2:_(s8) = G_CONSTANT i8 8
%3:_(s8) = G_AND %0, %1
%4:_(s8) = G_OR %3, %2
%5:_(s8) = G_CTLS %4
...
---
name: CTLSNoKnown8
body: |
bb.1:
; CHECK-LABEL: name: @CTLSNoKnown8
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0000000000000??? SignBits:13
%0:_(s8) = COPY $b0
%1:_(s16) = G_CTLS %0
...
---
name: CTLSNoKnown16
body: |
bb.1:
; CHECK-LABEL: name: @CTLSNoKnown16
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:000000000000???? SignBits:12
%0:_(s16) = COPY $h0
%1:_(s16) = G_CTLS %0
...
---
name: CTLSNoKnown32
body: |
bb.1:
; CHECK-LABEL: name: @CTLSNoKnown32
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000000000????? SignBits:11
%0:_(s32) = COPY $s0
%1:_(s16) = G_CTLS %0
...
---
name: CTLSHalfKnown8
body: |
bb.1:
; CHECK-LABEL: name: @CTLSHalfKnown8
; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5
; CHECK-NEXT: %2:_ KnownBits:00000?00 SignBits:5
; CHECK-NEXT: %3:_ KnownBits:000001?? SignBits:5
%0:_(s8) = COPY $b0
%1:_(s8) = G_CONSTANT i8 4
%2:_(s8) = G_AND %0, %1
%3:_(s8) = G_CTLS %2
...
---
name: CTLSHalfKnown16
body: |
bb.1:
; CHECK-LABEL: name: @CTLSHalfKnown16
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0000000001000000 SignBits:9
; CHECK-NEXT: %2:_ KnownBits:000000000?000000 SignBits:9
; CHECK-NEXT: %3:_ KnownBits:0000000000001??? SignBits:12
%0:_(s16) = COPY $h0
%1:_(s16) = G_CONSTANT i16 64
%2:_(s16) = G_AND %0, %1
%3:_(s16) = G_CTLS %2
...
---
name: CTLSHalfConst8Zero
body: |
bb.1:
; CHECK-LABEL: name: @CTLSHalfConst8Zero
; CHECK-NEXT: %0:_ KnownBits:00000000 SignBits:8
; CHECK-NEXT: %1:_ KnownBits:00000111 SignBits:5
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CTLS %0
...
---
name: CTLSHalfConst16Zero
body: |
bb.1:
; CHECK-LABEL: name: @CTLSHalfConst16Zero
; CHECK-NEXT: %0:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %1:_ KnownBits:0000000000001111 SignBits:12
%0:_(s16) = G_CONSTANT i16 0
%1:_(s16) = G_CTLS %0
...
---
name: VectorCTLSConst16Zero
body: |
bb.1:
; CHECK-LABEL: name: @VectorCTLSConst16Zero
; CHECK-NEXT: %0:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %1:_ KnownBits:0000000000000000 SignBits:16
; CHECK-NEXT: %2:_ KnownBits:0000000000001111 SignBits:12
%0:_(s16) = G_CONSTANT i16 0
%1:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0
%3:_(<4 x s16>) = G_CTLS %1
...
---
name: VectorCTLSNoneKnown
body: |
bb.1:
; CHECK-LABEL: name: @VectorCTLSNoneKnown
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0000000000001000 SignBits:12
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %5:_ KnownBits:000000000000???? SignBits:12
%0:_(s16) = COPY $h0
%1:_(s16) = G_CONSTANT i16 8
%2:_(s16) = G_ASHR %0, %1
%3:_(s16) = COPY $h1
%4:_(<4 x s16>) = G_BUILD_VECTOR %2, %3, %2, %3
%5:_(<4 x s16>) = G_CTLS %4
...
---
name: VectorCTLSHighBitKnown
body: |
bb.1:
; CHECK-LABEL: name: @VectorCTLSHighBitKnown
; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:0000000000001000 SignBits:12
; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1
; CHECK-NEXT: %4:_ KnownBits:0000000000001010 SignBits:12
; CHECK-NEXT: %5:_ KnownBits:000000000000???? SignBits:12
; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:9
; CHECK-NEXT: %7:_ KnownBits:0000000000001??? SignBits:12
%0:_(s16) = COPY $h0
%1:_(s16) = G_CONSTANT i16 8
%2:_(s16) = G_ASHR %0, %1
%3:_(s16) = COPY $h1
%4:_(s16) = G_CONSTANT i16 10
%5:_(s16) = G_ASHR %4, %5
%6:_(<4 x s16>) = G_BUILD_VECTOR %2, %5, %2, %4
%7:_(<4 x s16>) = G_CTLS %6
...
---
name: CTLSLargeEnough
body: |
bb.1:
; CHECK-LABEL: name: @CTLSLargeEnough
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000000000000000000000000010000 SignBits:27
; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:17
; CHECK-NEXT: %3:_ KnownBits:0000000000000000000000000001???? SignBits:27
%0:_(s32) = COPY $s0
%1:_(s32) = G_CONSTANT i32 16
%2:_(s32) = G_ASHR %0, %1
%3:_(s32) = G_CTLS %2
...
---
name: CTLSTooSmallToTrigger
body: |
bb.1:
; CHECK-LABEL: name: @CTLSTooSmallToTrigger
; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
; CHECK-NEXT: %1:_ KnownBits:00000000000000000000000000001111 SignBits:28
; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:16
; CHECK-NEXT: %3:_ KnownBits:000000000000000000000000000????? SignBits:27
%0:_(s32) = COPY $s0
%1:_(s32) = G_CONSTANT i32 15
%2:_(s32) = G_ASHR %0, %1
%3:_(s32) = G_CTLS %2
...