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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminimum.mir
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derek.holloway 7502bf64a4
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=legalizer -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=FP16
# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=NO-FP16
...
---
name: s16_legal_with_full_fp16
alignment: 4
body: |
bb.0:
liveins: $h0, $h1
; FP16-LABEL: name: s16_legal_with_full_fp16
; FP16: liveins: $h0, $h1
; FP16-NEXT: {{ $}}
; FP16-NEXT: %a:_(f16) = COPY $h0
; FP16-NEXT: %b:_(f16) = COPY $h1
; FP16-NEXT: %legalize_me:_(f16) = G_FMINIMUM %a, %b
; FP16-NEXT: $h0 = COPY %legalize_me(f16)
; FP16-NEXT: RET_ReallyLR implicit $h0
;
; NO-FP16-LABEL: name: s16_legal_with_full_fp16
; NO-FP16: liveins: $h0, $h1
; NO-FP16-NEXT: {{ $}}
; NO-FP16-NEXT: %a:_(f16) = COPY $h0
; NO-FP16-NEXT: %b:_(f16) = COPY $h1
; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(f32) = G_FPEXT %a(f16)
; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(f32) = G_FPEXT %b(f16)
; NO-FP16-NEXT: [[FMINIMUM:%[0-9]+]]:_(f32) = G_FMINIMUM [[FPEXT]], [[FPEXT1]]
; NO-FP16-NEXT: %legalize_me:_(f16) = G_FPTRUNC [[FMINIMUM]](f32)
; NO-FP16-NEXT: $h0 = COPY %legalize_me(f16)
; NO-FP16-NEXT: RET_ReallyLR implicit $h0
%a:_(f16) = COPY $h0
%b:_(f16) = COPY $h1
%legalize_me:_(f16) = G_FMINIMUM %a, %b
$h0 = COPY %legalize_me(f16)
RET_ReallyLR implicit $h0
...
---
name: s32_legal
alignment: 4
body: |
bb.0:
liveins: $s0, $s1
; FP16-LABEL: name: s32_legal
; FP16: liveins: $s0, $s1
; FP16-NEXT: {{ $}}
; FP16-NEXT: %a:_(f32) = COPY $s0
; FP16-NEXT: %b:_(f32) = COPY $s1
; FP16-NEXT: %legalize_me:_(f32) = G_FMINIMUM %a, %b
; FP16-NEXT: $s0 = COPY %legalize_me(f32)
; FP16-NEXT: RET_ReallyLR implicit $s0
;
; NO-FP16-LABEL: name: s32_legal
; NO-FP16: liveins: $s0, $s1
; NO-FP16-NEXT: {{ $}}
; NO-FP16-NEXT: %a:_(f32) = COPY $s0
; NO-FP16-NEXT: %b:_(f32) = COPY $s1
; NO-FP16-NEXT: %legalize_me:_(f32) = G_FMINIMUM %a, %b
; NO-FP16-NEXT: $s0 = COPY %legalize_me(f32)
; NO-FP16-NEXT: RET_ReallyLR implicit $s0
%a:_(f32) = COPY $s0
%b:_(f32) = COPY $s1
%legalize_me:_(f32) = G_FMINIMUM %a, %b
$s0 = COPY %legalize_me(f32)
RET_ReallyLR implicit $s0
...
---
name: s64_legal
alignment: 4
body: |
bb.0:
liveins: $d0, $d1
; FP16-LABEL: name: s64_legal
; FP16: liveins: $d0, $d1
; FP16-NEXT: {{ $}}
; FP16-NEXT: %a:_(f64) = COPY $d0
; FP16-NEXT: %b:_(f64) = COPY $d1
; FP16-NEXT: %legalize_me:_(f64) = G_FMINIMUM %a, %b
; FP16-NEXT: $d0 = COPY %legalize_me(f64)
; FP16-NEXT: RET_ReallyLR implicit $d0
;
; NO-FP16-LABEL: name: s64_legal
; NO-FP16: liveins: $d0, $d1
; NO-FP16-NEXT: {{ $}}
; NO-FP16-NEXT: %a:_(f64) = COPY $d0
; NO-FP16-NEXT: %b:_(f64) = COPY $d1
; NO-FP16-NEXT: %legalize_me:_(f64) = G_FMINIMUM %a, %b
; NO-FP16-NEXT: $d0 = COPY %legalize_me(f64)
; NO-FP16-NEXT: RET_ReallyLR implicit $d0
%a:_(f64) = COPY $d0
%b:_(f64) = COPY $d1
%legalize_me:_(f64) = G_FMINIMUM %a, %b
$d0 = COPY %legalize_me(f64)
RET_ReallyLR implicit $d0
...
---
name: v4s32
alignment: 4
body: |
bb.0:
liveins: $q0, $q1
; FP16-LABEL: name: v4s32
; FP16: liveins: $q0, $q1
; FP16-NEXT: {{ $}}
; FP16-NEXT: %a:_(<4 x f32>) = COPY $q0
; FP16-NEXT: %b:_(<4 x f32>) = COPY $q1
; FP16-NEXT: %minimum:_(<4 x f32>) = G_FMINIMUM %a, %b
; FP16-NEXT: $q0 = COPY %minimum(<4 x f32>)
; FP16-NEXT: RET_ReallyLR implicit $q0
;
; NO-FP16-LABEL: name: v4s32
; NO-FP16: liveins: $q0, $q1
; NO-FP16-NEXT: {{ $}}
; NO-FP16-NEXT: %a:_(<4 x f32>) = COPY $q0
; NO-FP16-NEXT: %b:_(<4 x f32>) = COPY $q1
; NO-FP16-NEXT: %minimum:_(<4 x f32>) = G_FMINIMUM %a, %b
; NO-FP16-NEXT: $q0 = COPY %minimum(<4 x f32>)
; NO-FP16-NEXT: RET_ReallyLR implicit $q0
%a:_(<4 x f32>) = COPY $q0
%b:_(<4 x f32>) = COPY $q1
%minimum:_(<4 x f32>) = G_FMINIMUM %a, %b
$q0 = COPY %minimum(<4 x f32>)
RET_ReallyLR implicit $q0
...
---
name: v8s32
alignment: 4
body: |
bb.0:
liveins: $q0, $q1, $q2, $q3
; FP16-LABEL: name: v8s32
; FP16: liveins: $q0, $q1, $q2, $q3
; FP16-NEXT: {{ $}}
; FP16-NEXT: %a:_(<4 x f32>) = COPY $q0
; FP16-NEXT: %b:_(<4 x f32>) = COPY $q1
; FP16-NEXT: %c:_(<4 x f32>) = COPY $q2
; FP16-NEXT: %d:_(<4 x f32>) = COPY $q3
; FP16-NEXT: [[FMINIMUM:%[0-9]+]]:_(<4 x f32>) = G_FMINIMUM %a, %c
; FP16-NEXT: [[FMINIMUM1:%[0-9]+]]:_(<4 x f32>) = G_FMINIMUM %b, %d
; FP16-NEXT: $q0 = COPY [[FMINIMUM]](<4 x f32>)
; FP16-NEXT: $q1 = COPY [[FMINIMUM1]](<4 x f32>)
; FP16-NEXT: RET_ReallyLR implicit $q0
;
; NO-FP16-LABEL: name: v8s32
; NO-FP16: liveins: $q0, $q1, $q2, $q3
; NO-FP16-NEXT: {{ $}}
; NO-FP16-NEXT: %a:_(<4 x f32>) = COPY $q0
; NO-FP16-NEXT: %b:_(<4 x f32>) = COPY $q1
; NO-FP16-NEXT: %c:_(<4 x f32>) = COPY $q2
; NO-FP16-NEXT: %d:_(<4 x f32>) = COPY $q3
; NO-FP16-NEXT: [[FMINIMUM:%[0-9]+]]:_(<4 x f32>) = G_FMINIMUM %a, %c
; NO-FP16-NEXT: [[FMINIMUM1:%[0-9]+]]:_(<4 x f32>) = G_FMINIMUM %b, %d
; NO-FP16-NEXT: $q0 = COPY [[FMINIMUM]](<4 x f32>)
; NO-FP16-NEXT: $q1 = COPY [[FMINIMUM1]](<4 x f32>)
; NO-FP16-NEXT: RET_ReallyLR implicit $q0
%a:_(<4 x f32>) = COPY $q0
%b:_(<4 x f32>) = COPY $q1
%c:_(<4 x f32>) = COPY $q2
%d:_(<4 x f32>) = COPY $q3
%v1:_(<8 x f32>) = G_CONCAT_VECTORS %a, %b
%v2:_(<8 x f32>) = G_CONCAT_VECTORS %c, %d
%minimum:_(<8 x f32>) = G_FMINIMUM %v1, %v2
%uv1:_(<4 x f32>), %uv2:_(<4 x f32>) = G_UNMERGE_VALUES %minimum
$q0 = COPY %uv1(<4 x f32>)
$q1 = COPY %uv2(<4 x f32>)
RET_ReallyLR implicit $q0
...