derek.holloway
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175 lines
5.5 KiB
YAML
175 lines
5.5 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple aarch64-unknown-unknown -verify-machineinstrs -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=NO-FP16
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# RUN: llc -mtriple aarch64-unknown-unknown -verify-machineinstrs -mattr=+fullfp16 -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=FP16
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...
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---
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name: fadd
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $h0, $h1
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; NO-FP16-LABEL: name: fadd
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; NO-FP16: liveins: $h0, $h1
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; NO-FP16-NEXT: {{ $}}
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; NO-FP16-NEXT: %x:_(f16) = COPY $h0
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; NO-FP16-NEXT: %y:_(f16) = COPY $h1
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; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(f32) = G_FPEXT %x(f16)
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; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(f32) = G_FPEXT %y(f16)
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; NO-FP16-NEXT: [[FADD:%[0-9]+]]:_(f32) = G_FADD [[FPEXT]], [[FPEXT1]]
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; NO-FP16-NEXT: %op:_(f16) = G_FPTRUNC [[FADD]](f32)
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; NO-FP16-NEXT: $h0 = COPY %op(f16)
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; NO-FP16-NEXT: RET_ReallyLR implicit $h0
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;
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; FP16-LABEL: name: fadd
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; FP16: liveins: $h0, $h1
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; FP16-NEXT: {{ $}}
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; FP16-NEXT: %x:_(f16) = COPY $h0
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; FP16-NEXT: %y:_(f16) = COPY $h1
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; FP16-NEXT: %op:_(f16) = G_FADD %x, %y
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; FP16-NEXT: $h0 = COPY %op(f16)
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; FP16-NEXT: RET_ReallyLR implicit $h0
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%x:_(f16) = COPY $h0
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%y:_(f16) = COPY $h1
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%op:_(f16) = G_FADD %x, %y
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$h0 = COPY %op(f16)
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RET_ReallyLR implicit $h0
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...
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---
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name: fsub
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $h0, $h1
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; NO-FP16-LABEL: name: fsub
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; NO-FP16: liveins: $h0, $h1
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; NO-FP16-NEXT: {{ $}}
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; NO-FP16-NEXT: %x:_(f16) = COPY $h0
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; NO-FP16-NEXT: %y:_(f16) = COPY $h1
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; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(f32) = G_FPEXT %x(f16)
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; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(f32) = G_FPEXT %y(f16)
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; NO-FP16-NEXT: [[FSUB:%[0-9]+]]:_(f32) = G_FSUB [[FPEXT]], [[FPEXT1]]
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; NO-FP16-NEXT: %op:_(f16) = G_FPTRUNC [[FSUB]](f32)
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; NO-FP16-NEXT: $h0 = COPY %op(f16)
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; NO-FP16-NEXT: RET_ReallyLR implicit $h0
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;
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; FP16-LABEL: name: fsub
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; FP16: liveins: $h0, $h1
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; FP16-NEXT: {{ $}}
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; FP16-NEXT: %x:_(f16) = COPY $h0
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; FP16-NEXT: %y:_(f16) = COPY $h1
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; FP16-NEXT: %op:_(f16) = G_FSUB %x, %y
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; FP16-NEXT: $h0 = COPY %op(f16)
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; FP16-NEXT: RET_ReallyLR implicit $h0
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%x:_(f16) = COPY $h0
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%y:_(f16) = COPY $h1
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%op:_(f16) = G_FSUB %x, %y
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$h0 = COPY %op(f16)
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RET_ReallyLR implicit $h0
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...
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---
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name: fmul
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $h0, $h1
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; NO-FP16-LABEL: name: fmul
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; NO-FP16: liveins: $h0, $h1
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; NO-FP16-NEXT: {{ $}}
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; NO-FP16-NEXT: %x:_(f16) = COPY $h0
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; NO-FP16-NEXT: %y:_(f16) = COPY $h1
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; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(f32) = G_FPEXT %x(f16)
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; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(f32) = G_FPEXT %y(f16)
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; NO-FP16-NEXT: [[FMUL:%[0-9]+]]:_(f32) = G_FMUL [[FPEXT]], [[FPEXT1]]
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; NO-FP16-NEXT: %op:_(f16) = G_FPTRUNC [[FMUL]](f32)
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; NO-FP16-NEXT: $h0 = COPY %op(f16)
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; NO-FP16-NEXT: RET_ReallyLR implicit $h0
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;
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; FP16-LABEL: name: fmul
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; FP16: liveins: $h0, $h1
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; FP16-NEXT: {{ $}}
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; FP16-NEXT: %x:_(f16) = COPY $h0
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; FP16-NEXT: %y:_(f16) = COPY $h1
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; FP16-NEXT: %op:_(f16) = G_FMUL %x, %y
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; FP16-NEXT: $h0 = COPY %op(f16)
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; FP16-NEXT: RET_ReallyLR implicit $h0
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%x:_(f16) = COPY $h0
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%y:_(f16) = COPY $h1
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%op:_(f16) = G_FMUL %x, %y
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$h0 = COPY %op(f16)
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RET_ReallyLR implicit $h0
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...
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---
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name: fdiv
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $h0, $h1
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; NO-FP16-LABEL: name: fdiv
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; NO-FP16: liveins: $h0, $h1
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; NO-FP16-NEXT: {{ $}}
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; NO-FP16-NEXT: %x:_(f16) = COPY $h0
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; NO-FP16-NEXT: %y:_(f16) = COPY $h1
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; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(f32) = G_FPEXT %x(f16)
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; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(f32) = G_FPEXT %y(f16)
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; NO-FP16-NEXT: [[FDIV:%[0-9]+]]:_(f32) = G_FDIV [[FPEXT]], [[FPEXT1]]
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; NO-FP16-NEXT: %op:_(f16) = G_FPTRUNC [[FDIV]](f32)
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; NO-FP16-NEXT: $h0 = COPY %op(f16)
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; NO-FP16-NEXT: RET_ReallyLR implicit $h0
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;
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; FP16-LABEL: name: fdiv
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; FP16: liveins: $h0, $h1
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; FP16-NEXT: {{ $}}
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; FP16-NEXT: %x:_(f16) = COPY $h0
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; FP16-NEXT: %y:_(f16) = COPY $h1
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; FP16-NEXT: %op:_(f16) = G_FDIV %x, %y
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; FP16-NEXT: $h0 = COPY %op(f16)
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; FP16-NEXT: RET_ReallyLR implicit $h0
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%x:_(f16) = COPY $h0
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%y:_(f16) = COPY $h1
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%op:_(f16) = G_FDIV %x, %y
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$h0 = COPY %op(f16)
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RET_ReallyLR implicit $h0
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...
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---
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name: fneg
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $h0
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; NO-FP16-LABEL: name: fneg
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; NO-FP16: liveins: $h0
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; NO-FP16-NEXT: {{ $}}
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; NO-FP16-NEXT: %x:_(f16) = COPY $h0
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; NO-FP16-NEXT: [[BITCAST:%[0-9]+]]:_(i16) = G_BITCAST %x(f16)
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; NO-FP16-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[BITCAST]](i16)
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; NO-FP16-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -32768
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; NO-FP16-NEXT: [[XOR:%[0-9]+]]:_(i32) = G_XOR [[ANYEXT]], [[C]]
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; NO-FP16-NEXT: [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[XOR]](i32)
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; NO-FP16-NEXT: %op:_(f16) = G_BITCAST [[TRUNC]](i16)
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; NO-FP16-NEXT: $h0 = COPY %op(f16)
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; NO-FP16-NEXT: RET_ReallyLR implicit $h0
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;
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; FP16-LABEL: name: fneg
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; FP16: liveins: $h0
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; FP16-NEXT: {{ $}}
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; FP16-NEXT: %x:_(f16) = COPY $h0
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; FP16-NEXT: %op:_(f16) = G_FNEG %x
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; FP16-NEXT: $h0 = COPY %op(f16)
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; FP16-NEXT: RET_ReallyLR implicit $h0
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%x:_(f16) = COPY $h0
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%op:_(f16) = G_FNEG %x
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$h0 = COPY %op(f16)
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RET_ReallyLR implicit $h0
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...
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