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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-arith.mir
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

111 lines
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YAML

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
---
name: test_fadd_v2s64
body: |
bb.0.entry:
; CHECK-LABEL: name: test_fadd_v2s64
; CHECK: [[COPY:%[0-9]+]]:_(<2 x f64>) = COPY $q0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x f64>) = COPY $q1
; CHECK-NEXT: [[FADD:%[0-9]+]]:_(<2 x f64>) = G_FADD [[COPY]], [[COPY1]]
; CHECK-NEXT: $q0 = COPY [[FADD]](<2 x f64>)
%0:_(<2 x f64>) = COPY $q0
%1:_(<2 x f64>) = COPY $q1
%2:_(<2 x f64>) = G_FADD %0, %1
$q0 = COPY %2(<2 x f64>)
...
---
name: test_fdiv_v2s32
body: |
bb.0.entry:
; CHECK-LABEL: name: test_fdiv_v2s32
; CHECK: [[COPY:%[0-9]+]]:_(<2 x f32>) = COPY $d0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x f32>) = COPY $d1
; CHECK-NEXT: [[FDIV:%[0-9]+]]:_(<2 x f32>) = G_FDIV [[COPY]], [[COPY1]]
; CHECK-NEXT: $d0 = COPY [[FDIV]](<2 x f32>)
%0:_(<2 x f32>) = COPY $d0
%1:_(<2 x f32>) = COPY $d1
%2:_(<2 x f32>) = G_FDIV %0, %1
$d0 = COPY %2(<2 x f32>)
...
---
name: test_fsub_v2s32
body: |
bb.0.entry:
; CHECK-LABEL: name: test_fsub_v2s32
; CHECK: [[COPY:%[0-9]+]]:_(<2 x f32>) = COPY $d0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x f32>) = COPY $d1
; CHECK-NEXT: [[FSUB:%[0-9]+]]:_(<2 x f32>) = G_FSUB [[COPY]], [[COPY1]]
; CHECK-NEXT: $d0 = COPY [[FSUB]](<2 x f32>)
%0:_(<2 x f32>) = COPY $d0
%1:_(<2 x f32>) = COPY $d1
%2:_(<2 x f32>) = G_FSUB %0, %1
$d0 = COPY %2(<2 x f32>)
...
---
name: test_fneg_v2s32
body: |
bb.0.entry:
; CHECK-LABEL: name: test_fneg_v2s32
; CHECK: [[COPY:%[0-9]+]]:_(<2 x f32>) = COPY $d0
; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(<2 x f32>) = G_FNEG [[COPY]]
; CHECK-NEXT: $d0 = COPY [[FNEG]](<2 x f32>)
%0:_(<2 x f32>) = COPY $d0
%1:_(<2 x f32>) = G_FNEG %0
$d0 = COPY %1(<2 x f32>)
...
---
name: test_fmul_v4s32
body: |
bb.0.entry:
; CHECK-LABEL: name: test_fmul_v4s32
; CHECK: [[COPY:%[0-9]+]]:_(<4 x f32>) = COPY $q0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x f32>) = COPY $q1
; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<4 x f32>) = G_FMUL [[COPY]], [[COPY1]]
; CHECK-NEXT: $q0 = COPY [[FMUL]](<4 x f32>)
%0:_(<4 x f32>) = COPY $q0
%1:_(<4 x f32>) = COPY $q1
%2:_(<4 x f32>) = G_FMUL %0, %1
$q0 = COPY %2(<4 x f32>)
...
---
name: test_fmul_v4s64
body: |
bb.0.entry:
; CHECK-LABEL: name: test_fmul_v4s64
; CHECK: [[DEF:%[0-9]+]]:_(<2 x f64>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<2 x f64>) = G_FMUL [[DEF]], [[DEF]]
; CHECK-NEXT: [[FMUL1:%[0-9]+]]:_(<2 x f64>) = G_FMUL [[DEF]], [[DEF]]
; CHECK-NEXT: $q0 = COPY [[FMUL]](<2 x f64>)
; CHECK-NEXT: $q1 = COPY [[FMUL1]](<2 x f64>)
%0:_(<4 x f64>) = G_IMPLICIT_DEF
%1:_(<4 x f64>) = G_IMPLICIT_DEF
%2:_(<4 x f64>) = G_FMUL %0, %1
%uv1:_(<2 x f64>), %uv2:_(<2 x f64>) = G_UNMERGE_VALUES %2
$q0 = COPY %uv1(<2 x f64>)
$q1 = COPY %uv2(<2 x f64>)
...
---
name: test_fmul_v8s32
body: |
bb.0.entry:
; CHECK-LABEL: name: test_fmul_v8s32
; CHECK: [[DEF:%[0-9]+]]:_(<4 x f32>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<4 x f32>) = G_FMUL [[DEF]], [[DEF]]
; CHECK-NEXT: [[FMUL1:%[0-9]+]]:_(<4 x f32>) = G_FMUL [[DEF]], [[DEF]]
; CHECK-NEXT: $q0 = COPY [[FMUL]](<4 x f32>)
; CHECK-NEXT: $q1 = COPY [[FMUL1]](<4 x f32>)
%0:_(<8 x f32>) = G_IMPLICIT_DEF
%1:_(<8 x f32>) = G_IMPLICIT_DEF
%2:_(<8 x f32>) = G_FMUL %0, %1
%uv1:_(<4 x f32>), %uv2:_(<4 x f32>) = G_UNMERGE_VALUES %2
$q0 = COPY %uv1(<4 x f32>)
$q1 = COPY %uv2(<4 x f32>)
...