derek.holloway
7502bf64a4
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238 lines
7.6 KiB
YAML
238 lines
7.6 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -verify-machineinstrs -mtriple aarch64-unknown-unknown -run-pass=legalizer -mattr=-fullfp16 -global-isel %s -o - | FileCheck %s --check-prefix=NOFP16
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# RUN: llc -verify-machineinstrs -mtriple aarch64-unknown-unknown -run-pass=legalizer -mattr=+fullfp16 -global-isel %s -o - | FileCheck %s --check-prefix=FP16
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name: test_f16.rint
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $h0
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%0:_(f16) = COPY $h0
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%1:_(f16) = G_FRINT %0
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$h0 = COPY %1(f16)
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RET_ReallyLR implicit $h0
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...
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---
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name: test_f32.rint
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $s0
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; NOFP16-LABEL: name: test_f32.rint
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; NOFP16: liveins: $s0
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; NOFP16-NEXT: {{ $}}
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; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(f32) = COPY $s0
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; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(f32) = G_FRINT [[COPY]]
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; NOFP16-NEXT: $s0 = COPY [[FRINT]](f32)
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; NOFP16-NEXT: RET_ReallyLR implicit $s0
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;
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; FP16-LABEL: name: test_f32.rint
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; FP16: liveins: $s0
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; FP16-NEXT: {{ $}}
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; FP16-NEXT: [[COPY:%[0-9]+]]:_(f32) = COPY $s0
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; FP16-NEXT: [[FRINT:%[0-9]+]]:_(f32) = G_FRINT [[COPY]]
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; FP16-NEXT: $s0 = COPY [[FRINT]](f32)
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; FP16-NEXT: RET_ReallyLR implicit $s0
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%0:_(f32) = COPY $s0
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%1:_(f32) = G_FRINT %0
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$s0 = COPY %1(f32)
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RET_ReallyLR implicit $s0
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...
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---
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name: test_f64.rint
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; NOFP16-LABEL: name: test_f64.rint
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; NOFP16: liveins: $d0
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; NOFP16-NEXT: {{ $}}
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; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(f64) = COPY $d0
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; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(f64) = G_FRINT [[COPY]]
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; NOFP16-NEXT: $d0 = COPY [[FRINT]](f64)
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; NOFP16-NEXT: RET_ReallyLR implicit $d0
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;
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; FP16-LABEL: name: test_f64.rint
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; FP16: liveins: $d0
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; FP16-NEXT: {{ $}}
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; FP16-NEXT: [[COPY:%[0-9]+]]:_(f64) = COPY $d0
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; FP16-NEXT: [[FRINT:%[0-9]+]]:_(f64) = G_FRINT [[COPY]]
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; FP16-NEXT: $d0 = COPY [[FRINT]](f64)
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; FP16-NEXT: RET_ReallyLR implicit $d0
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%0:_(f64) = COPY $d0
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%1:_(f64) = G_FRINT %0
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$d0 = COPY %1(f64)
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RET_ReallyLR implicit $d0
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...
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---
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name: test_v4f32.rint
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $q0
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; NOFP16-LABEL: name: test_v4f32.rint
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; NOFP16: liveins: $q0
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; NOFP16-NEXT: {{ $}}
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; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x f32>) = COPY $q0
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; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(<4 x f32>) = G_FRINT [[COPY]]
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; NOFP16-NEXT: $q0 = COPY [[FRINT]](<4 x f32>)
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; NOFP16-NEXT: RET_ReallyLR implicit $q0
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;
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; FP16-LABEL: name: test_v4f32.rint
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; FP16: liveins: $q0
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; FP16-NEXT: {{ $}}
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; FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x f32>) = COPY $q0
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; FP16-NEXT: [[FRINT:%[0-9]+]]:_(<4 x f32>) = G_FRINT [[COPY]]
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; FP16-NEXT: $q0 = COPY [[FRINT]](<4 x f32>)
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; FP16-NEXT: RET_ReallyLR implicit $q0
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%0:_(<4 x f32>) = COPY $q0
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%1:_(<4 x f32>) = G_FRINT %0
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$q0 = COPY %1(<4 x f32>)
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RET_ReallyLR implicit $q0
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...
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---
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name: test_v2f64.rint
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $q0
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; NOFP16-LABEL: name: test_v2f64.rint
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; NOFP16: liveins: $q0
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; NOFP16-NEXT: {{ $}}
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; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x f64>) = COPY $q0
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; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(<2 x f64>) = G_FRINT [[COPY]]
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; NOFP16-NEXT: $q0 = COPY [[FRINT]](<2 x f64>)
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; NOFP16-NEXT: RET_ReallyLR implicit $q0
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;
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; FP16-LABEL: name: test_v2f64.rint
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; FP16: liveins: $q0
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; FP16-NEXT: {{ $}}
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; FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x f64>) = COPY $q0
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; FP16-NEXT: [[FRINT:%[0-9]+]]:_(<2 x f64>) = G_FRINT [[COPY]]
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; FP16-NEXT: $q0 = COPY [[FRINT]](<2 x f64>)
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; FP16-NEXT: RET_ReallyLR implicit $q0
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%0:_(<2 x f64>) = COPY $q0
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%1:_(<2 x f64>) = G_FRINT %0
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$q0 = COPY %1(<2 x f64>)
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RET_ReallyLR implicit $q0
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...
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---
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name: test_v4f16.rint
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; NOFP16-LABEL: name: test_v4f16.rint
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; NOFP16: liveins: $d0
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; NOFP16-NEXT: {{ $}}
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; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x f16>) = COPY $d0
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; NOFP16-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[COPY]](<4 x f16>)
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; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(<4 x f32>) = G_FRINT [[FPEXT]]
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; NOFP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(<4 x f16>) = G_FPTRUNC [[FRINT]](<4 x f32>)
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; NOFP16-NEXT: $d0 = COPY [[FPTRUNC]](<4 x f16>)
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; NOFP16-NEXT: RET_ReallyLR implicit $d0
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;
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; FP16-LABEL: name: test_v4f16.rint
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; FP16: liveins: $d0
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; FP16-NEXT: {{ $}}
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; FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x f16>) = COPY $d0
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; FP16-NEXT: [[FRINT:%[0-9]+]]:_(<4 x f16>) = G_FRINT [[COPY]]
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; FP16-NEXT: $d0 = COPY [[FRINT]](<4 x f16>)
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; FP16-NEXT: RET_ReallyLR implicit $d0
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%0:_(<4 x f16>) = COPY $d0
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%1:_(<4 x f16>) = G_FRINT %0
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$d0 = COPY %1(<4 x f16>)
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RET_ReallyLR implicit $d0
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...
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---
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name: test_v8f16.rint
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $q0
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; NOFP16-LABEL: name: test_v8f16.rint
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; NOFP16: liveins: $q0
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; NOFP16-NEXT: {{ $}}
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; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(<8 x f16>) = COPY $q0
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; NOFP16-NEXT: [[UV:%[0-9]+]]:_(<4 x f16>), [[UV1:%[0-9]+]]:_(<4 x f16>) = G_UNMERGE_VALUES [[COPY]](<8 x f16>)
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; NOFP16-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[UV]](<4 x f16>)
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; NOFP16-NEXT: [[FPEXT1:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[UV1]](<4 x f16>)
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; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(<4 x f32>) = G_FRINT [[FPEXT]]
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; NOFP16-NEXT: [[FRINT1:%[0-9]+]]:_(<4 x f32>) = G_FRINT [[FPEXT1]]
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; NOFP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(<4 x f16>) = G_FPTRUNC [[FRINT]](<4 x f32>)
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; NOFP16-NEXT: [[FPTRUNC1:%[0-9]+]]:_(<4 x f16>) = G_FPTRUNC [[FRINT1]](<4 x f32>)
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; NOFP16-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x f16>) = G_CONCAT_VECTORS [[FPTRUNC]](<4 x f16>), [[FPTRUNC1]](<4 x f16>)
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; NOFP16-NEXT: $q0 = COPY [[CONCAT_VECTORS]](<8 x f16>)
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; NOFP16-NEXT: RET_ReallyLR implicit $q0
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;
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; FP16-LABEL: name: test_v8f16.rint
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; FP16: liveins: $q0
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; FP16-NEXT: {{ $}}
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; FP16-NEXT: [[COPY:%[0-9]+]]:_(<8 x f16>) = COPY $q0
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; FP16-NEXT: [[FRINT:%[0-9]+]]:_(<8 x f16>) = G_FRINT [[COPY]]
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; FP16-NEXT: $q0 = COPY [[FRINT]](<8 x f16>)
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; FP16-NEXT: RET_ReallyLR implicit $q0
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%0:_(<8 x f16>) = COPY $q0
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%1:_(<8 x f16>) = G_FRINT %0
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$q0 = COPY %1(<8 x f16>)
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RET_ReallyLR implicit $q0
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...
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---
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name: test_v2f32.rint
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; NOFP16-LABEL: name: test_v2f32.rint
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; NOFP16: liveins: $d0
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; NOFP16-NEXT: {{ $}}
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; NOFP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x f32>) = COPY $d0
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; NOFP16-NEXT: [[FRINT:%[0-9]+]]:_(<2 x f32>) = G_FRINT [[COPY]]
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; NOFP16-NEXT: $d0 = COPY [[FRINT]](<2 x f32>)
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; NOFP16-NEXT: RET_ReallyLR implicit $d0
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;
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; FP16-LABEL: name: test_v2f32.rint
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; FP16: liveins: $d0
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; FP16-NEXT: {{ $}}
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; FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x f32>) = COPY $d0
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; FP16-NEXT: [[FRINT:%[0-9]+]]:_(<2 x f32>) = G_FRINT [[COPY]]
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; FP16-NEXT: $d0 = COPY [[FRINT]](<2 x f32>)
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; FP16-NEXT: RET_ReallyLR implicit $d0
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%0:_(<2 x f32>) = COPY $d0
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%1:_(<2 x f32>) = G_FRINT %0
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$d0 = COPY %1(<2 x f32>)
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RET_ReallyLR implicit $d0
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...
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