derek.holloway
7502bf64a4
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32 lines
1.3 KiB
YAML
32 lines
1.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
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---
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name: mul_2H
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $q0, $q1
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; CHECK-LABEL: name: mul_2H
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; CHECK: liveins: $q0, $q1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x f32>) = COPY $q0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x f32>) = COPY $q1
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<4 x f32>) = G_FMUL [[COPY]], [[COPY1]]
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; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x f32>), [[UV1:%[0-9]+]]:_(<2 x f32>) = G_UNMERGE_VALUES [[FMUL]](<4 x f32>)
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; CHECK-NEXT: [[FMUL1:%[0-9]+]]:_(<2 x f32>) = G_FMUL [[UV]], [[UV1]]
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; CHECK-NEXT: [[UV2:%[0-9]+]]:_(f32), [[UV3:%[0-9]+]]:_(f32) = G_UNMERGE_VALUES [[FMUL1]](<2 x f32>)
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; CHECK-NEXT: [[FMUL2:%[0-9]+]]:_(f32) = G_FMUL [[UV2]], [[UV3]]
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(f32) = COPY [[FMUL2]](f32)
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; CHECK-NEXT: $s0 = COPY [[COPY2]](f32)
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; CHECK-NEXT: RET_ReallyLR implicit $s0
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%1:_(<4 x f32>) = COPY $q0
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%2:_(<4 x f32>) = COPY $q1
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%0:_(<8 x f32>) = G_CONCAT_VECTORS %1(<4 x f32>), %2(<4 x f32>)
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%5:_(f32) = nnan ninf nsz arcp contract afn reassoc G_VECREDUCE_FMUL %0(<8 x f32>)
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$s0 = COPY %5(f32)
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RET_ReallyLR implicit $s0
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...
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