derek.holloway
7502bf64a4
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81 lines
2.7 KiB
LLVM
81 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple aarch64 -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD
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; RUN: llc -mtriple aarch64 -global-isel -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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; RUN: llc -mtriple aarch64 -O0 -global-isel -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-GIO0
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define <1 x i1> @shuffle_extract_4(<8 x i1> %a, <8 x i1> %b) {
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; CHECK-SD-LABEL: shuffle_extract_4:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-SD-NEXT: umov w0, v0.b[4]
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: shuffle_extract_4:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0
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; CHECK-GI-NEXT: umov w8, v0.h[4]
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; CHECK-GI-NEXT: and w0, w8, #0x1
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; CHECK-GI-NEXT: ret
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;
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; CHECK-GIO0-LABEL: shuffle_extract_4:
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; CHECK-GIO0: // %bb.0:
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; CHECK-GIO0-NEXT: ushll v0.8h, v0.8b, #0
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; CHECK-GIO0-NEXT: umov w8, v0.h[4]
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; CHECK-GIO0-NEXT: and w0, w8, #0x1
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; CHECK-GIO0-NEXT: ret
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%extractvec60 = shufflevector <8 x i1> %a, <8 x i1> %b, <1 x i32> <i32 4>
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ret <1 x i1> %extractvec60
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}
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define <1 x i1> @shuffle_extract_12(<8 x i1> %a, <8 x i1> %b) {
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; CHECK-SD-LABEL: shuffle_extract_12:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-SD-NEXT: umov w0, v1.b[4]
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: shuffle_extract_12:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: ushll v0.8h, v1.8b, #0
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; CHECK-GI-NEXT: umov w8, v0.h[4]
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; CHECK-GI-NEXT: and w0, w8, #0x1
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; CHECK-GI-NEXT: ret
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;
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; CHECK-GIO0-LABEL: shuffle_extract_12:
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; CHECK-GIO0: // %bb.0:
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; CHECK-GIO0-NEXT: ushll v0.8h, v1.8b, #0
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; CHECK-GIO0-NEXT: umov w8, v0.h[4]
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; CHECK-GIO0-NEXT: and w0, w8, #0x1
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; CHECK-GIO0-NEXT: ret
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%extractvec60 = shufflevector <8 x i1> %a, <8 x i1> %b, <1 x i32> <i32 12>
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ret <1 x i1> %extractvec60
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}
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define <1 x i1> @shuffle_extract_p(<8 x i1> %a, <8 x i1> %b) {
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; CHECK-SD-LABEL: shuffle_extract_p:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: shuffle_extract_p:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: mov w0, wzr
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; CHECK-GI-NEXT: ret
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;
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; CHECK-GIO0-LABEL: shuffle_extract_p:
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; CHECK-GIO0: // %bb.0:
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; CHECK-GIO0-NEXT: // implicit-def: $w8
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; CHECK-GIO0-NEXT: and w0, w8, #0x1
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; CHECK-GIO0-NEXT: ret
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%extractvec60 = shufflevector <8 x i1> %a, <8 x i1> %b, <1 x i32> <i32 poison>
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ret <1 x i1> %extractvec60
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}
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define <1 x i32> @shufflevector_v1i32(<1 x i32> %a, <1 x i32> %b) {
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; CHECK-LABEL: shufflevector_v1i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov d0, d1
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; CHECK-NEXT: ret
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%c = shufflevector <1 x i32> %a, <1 x i32> %b, <1 x i32> <i32 1>
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ret <1 x i32> %c
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}
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