derek.holloway
7502bf64a4
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197 lines
9.3 KiB
YAML
197 lines
9.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 %s -global-isel -start-before localizer \
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# RUN: -stop-after localizer -o - | FileCheck --check-prefix=CHECK %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-macosx12.0.0"
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@A = global i32 1234, align 4
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@B = global i32 5678, align 4
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@C = global i32 9012, align 4
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define noundef i32 @foo() !dbg !5 {
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%1 = alloca i32, align 4
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br i1 false, label %2, label %4
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2: ; preds = %0
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%3 = load i32, ptr @A, align 4, !dbg !10
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store volatile i32 %3, ptr %1, align 4
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br label %9
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4: ; preds = %0
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br i1 false, label %5, label %8
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5: ; preds = %4
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%6 = load i32, ptr @B, align 4, !dbg !13
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store volatile i32 %6, ptr %1, align 4
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%7 = load i32, ptr @B, align 4, !dbg !16
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store volatile i32 %7, ptr %1, align 4
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br label %9
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8: ; preds = %4
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store i32 3, ptr @C, align 4, !dbg !17
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br label %9
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9: ; preds = %8, %5, %2
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ret i32 0
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}
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!2, !3, !4}
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!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
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!1 = !DIFile(filename: "tmp.ll", directory: "/")
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!2 = !{i32 7, !"Dwarf Version", i32 4}
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!3 = !{i32 2, !"Debug Info Version", i32 3}
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!4 = !{i32 1, !"wchar_size", i32 4}
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!5 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 5, type: !6, scopeLine: 5, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !9)
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!6 = !DISubroutineType(types: !7)
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!7 = !{!8}
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!8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!9 = !{}
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!10 = !DILocation(line: 9, column: 9, scope: !11)
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!11 = distinct !DILexicalBlock(scope: !12, file: !1, line: 8, column: 15)
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!12 = distinct !DILexicalBlock(scope: !5, file: !1, line: 8, column: 7)
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!13 = !DILocation(line: 11, column: 9, scope: !14)
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!14 = distinct !DILexicalBlock(scope: !15, file: !1, line: 10, column: 22)
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!15 = distinct !DILexicalBlock(scope: !12, file: !1, line: 10, column: 14)
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!16 = !DILocation(line: 12, column: 13, scope: !14)
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!17 = !DILocation(line: 14, column: 7, scope: !18)
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!18 = distinct !DILexicalBlock(scope: !15, file: !1, line: 13, column: 10)
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...
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---
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name: foo
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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stack:
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- { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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; CHECK-LABEL: name: foo
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 3
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; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @C, debug-location !DILocation(line: 0, scope: !18)
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; CHECK-NEXT: [[ADD_LOW:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64-nc) @C, debug-location !DILocation(line: 0, scope: !18)
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; CHECK-NEXT: [[ADRP1:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @B, debug-location !DILocation(line: 0, scope: !14)
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; CHECK-NEXT: [[ADD_LOW1:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP1]](p0), target-flags(aarch64-pageoff, aarch64-nc) @B, debug-location !DILocation(line: 0, scope: !14)
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; CHECK-NEXT: [[ADRP2:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @A, debug-location !DILocation(line: 0, scope: !11)
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; CHECK-NEXT: [[ADD_LOW2:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP2]](p0), target-flags(aarch64-pageoff, aarch64-nc) @A, debug-location !DILocation(line: 0, scope: !11)
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; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %stack.0
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; CHECK-NEXT: [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY [[C1]](s32)
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; CHECK-NEXT: [[C2:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
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; CHECK-NEXT: [[XOR:%[0-9]+]]:gpr(s32) = G_XOR [[COPY]], [[C2]]
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; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[XOR]](s32)
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; CHECK-NEXT: G_BRCOND [[TRUNC]](s1), %bb.2
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; CHECK-NEXT: G_BR %bb.1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.5(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[ADRP3:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @A, debug-location !10
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; CHECK-NEXT: [[ADD_LOW3:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP3]](p0), target-flags(aarch64-pageoff, aarch64-nc) @A, debug-location !10
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; CHECK-NEXT: [[LOAD:%[0-9]+]]:gpr(s32) = G_LOAD [[ADD_LOW3]](p0), debug-location !10 :: (dereferenceable load (s32))
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; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %stack.0
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; CHECK-NEXT: G_STORE [[LOAD]](s32), [[FRAME_INDEX1]](p0) :: (volatile store (s32) into %ir.1)
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; CHECK-NEXT: G_BR %bb.5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[C3:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[C4:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
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; CHECK-NEXT: [[XOR1:%[0-9]+]]:gpr(s32) = G_XOR [[C3]], [[C4]]
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; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:gpr(s1) = G_TRUNC [[XOR1]](s32)
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; CHECK-NEXT: G_BRCOND [[TRUNC1]](s1), %bb.4
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; CHECK-NEXT: G_BR %bb.3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3:
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; CHECK-NEXT: successors: %bb.5(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[ADRP4:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @B, debug-location !DILocation(line: 0, scope: !14)
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; CHECK-NEXT: [[ADD_LOW4:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP4]](p0), target-flags(aarch64-pageoff, aarch64-nc) @B, debug-location !DILocation(line: 0, scope: !14)
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; CHECK-NEXT: [[LOAD1:%[0-9]+]]:gpr(s32) = G_LOAD [[ADD_LOW4]](p0), debug-location !13 :: (dereferenceable load (s32))
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; CHECK-NEXT: [[FRAME_INDEX2:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %stack.0
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; CHECK-NEXT: G_STORE [[LOAD1]](s32), [[FRAME_INDEX2]](p0) :: (volatile store (s32) into %ir.1)
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; CHECK-NEXT: [[LOAD2:%[0-9]+]]:gpr(s32) = G_LOAD [[ADD_LOW4]](p0), debug-location !16 :: (dereferenceable load (s32))
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; CHECK-NEXT: G_STORE [[LOAD2]](s32), [[FRAME_INDEX2]](p0) :: (volatile store (s32) into %ir.1)
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; CHECK-NEXT: G_BR %bb.5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.4:
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; CHECK-NEXT: successors: %bb.5(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[ADRP5:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @C, debug-location !17
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; CHECK-NEXT: [[ADD_LOW5:%[0-9]+]]:gpr(p0) = G_ADD_LOW [[ADRP5]](p0), target-flags(aarch64-pageoff, aarch64-nc) @C, debug-location !17
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; CHECK-NEXT: [[C5:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 3, debug-location !17
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; CHECK-NEXT: G_STORE [[C5]](s32), [[ADD_LOW5]](p0), debug-location !17 :: (store (s32) into @C)
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; CHECK-NEXT: G_BR %bb.5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.5:
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; CHECK-NEXT: [[C6:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: $w0 = COPY [[C6]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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bb.1:
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successors: %bb.2(0x40000000), %bb.3(0x40000000)
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%2:gpr(s32) = G_CONSTANT i32 3
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%24:gpr64(p0) = ADRP target-flags(aarch64-page) @C, debug-location !DILocation(line: 0, scope: !18)
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%3:gpr(p0) = G_ADD_LOW %24(p0), target-flags(aarch64-pageoff, aarch64-nc) @C, debug-location !DILocation(line: 0, scope: !18)
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%23:gpr64(p0) = ADRP target-flags(aarch64-page) @B, debug-location !DILocation(line: 0, scope: !14)
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%5:gpr(p0) = G_ADD_LOW %23(p0), target-flags(aarch64-pageoff, aarch64-nc) @B, debug-location !DILocation(line: 0, scope: !14)
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%22:gpr64(p0) = ADRP target-flags(aarch64-page) @A, debug-location !DILocation(line: 0, scope: !11)
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%8:gpr(p0) = G_ADD_LOW %22(p0), target-flags(aarch64-pageoff, aarch64-nc) @A, debug-location !DILocation(line: 0, scope: !11)
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%9:gpr(s32) = G_CONSTANT i32 0
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%0:gpr(p0) = G_FRAME_INDEX %stack.0
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%18:gpr(s32) = COPY %9(s32)
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%19:gpr(s32) = G_CONSTANT i32 1
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%20:gpr(s32) = G_XOR %18, %19
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%11:gpr(s1) = G_TRUNC %20(s32)
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G_BRCOND %11(s1), %bb.3
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G_BR %bb.2
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bb.2:
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successors: %bb.6(0x80000000)
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%7:gpr(s32) = G_LOAD %8(p0), debug-location !10 :: (dereferenceable load (s32))
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G_STORE %7(s32), %0(p0) :: (volatile store (s32) into %ir.1)
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G_BR %bb.6
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bb.3:
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successors: %bb.4(0x40000000), %bb.5(0x40000000)
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%14:gpr(s32) = G_CONSTANT i32 0
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%15:gpr(s32) = G_CONSTANT i32 1
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%16:gpr(s32) = G_XOR %14, %15
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%13:gpr(s1) = G_TRUNC %16(s32)
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G_BRCOND %13(s1), %bb.5
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G_BR %bb.4
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bb.4:
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successors: %bb.6(0x80000000)
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%4:gpr(s32) = G_LOAD %5(p0), debug-location !13 :: (dereferenceable load (s32))
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G_STORE %4(s32), %0(p0) :: (volatile store (s32) into %ir.1)
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%6:gpr(s32) = G_LOAD %5(p0), debug-location !16 :: (dereferenceable load (s32))
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G_STORE %6(s32), %0(p0) :: (volatile store (s32) into %ir.1)
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G_BR %bb.6
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bb.5:
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successors: %bb.6(0x80000000)
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G_STORE %2(s32), %3(p0), debug-location !17 :: (store (s32) into @C)
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G_BR %bb.6
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bb.6:
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$w0 = COPY %9(s32)
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RET_ReallyLR implicit $w0
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...
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