derek.holloway
7502bf64a4
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233 lines
6.8 KiB
YAML
233 lines
6.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple aarch64-unknown-unknown -run-pass=instruction-select -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s
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...
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---
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name: flip_eq
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alignment: 4
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legalized: true
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regBankSelected: true
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body: |
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; CHECK-LABEL: name: flip_eq
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64all = COPY $x0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %copy.sub_32
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
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; CHECK-NEXT: TBNZW [[COPY1]], 3, %bb.1
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; CHECK-NEXT: B %bb.0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: RET_ReallyLR
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bb.0:
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successors: %bb.0, %bb.1
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liveins: $x0
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%copy:gpr(i64) = COPY $x0
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; Check bit 3.
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%bit:gpr(i64) = G_CONSTANT i64 8
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%zero:gpr(i64) = G_CONSTANT i64 0
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; 8 has the third bit set.
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%fold_cst:gpr(i64) = G_CONSTANT i64 8
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; This only has the third bit set if %copy does not. So, to walk through
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; this, we want to use a TBNZW on %copy.
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%fold_me:gpr(i64) = G_XOR %copy, %fold_cst
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%and:gpr(i64) = G_AND %fold_me, %bit
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%cmp:gpr(i32) = G_ICMP intpred(eq), %and(i64), %zero
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G_BRCOND %cmp, %bb.1
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G_BR %bb.0
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bb.1:
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RET_ReallyLR
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...
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---
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name: flip_ne
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alignment: 4
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legalized: true
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regBankSelected: true
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body: |
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; CHECK-LABEL: name: flip_ne
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64all = COPY $x0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %copy.sub_32
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
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; CHECK-NEXT: TBZW [[COPY1]], 3, %bb.1
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; CHECK-NEXT: B %bb.0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: RET_ReallyLR
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bb.0:
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successors: %bb.0, %bb.1
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liveins: $x0
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; Same as eq case, but we should get a TBZW instead.
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%copy:gpr(i64) = COPY $x0
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%bit:gpr(i64) = G_CONSTANT i64 8
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%zero:gpr(i64) = G_CONSTANT i64 0
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%fold_cst:gpr(i64) = G_CONSTANT i64 8
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%fold_me:gpr(i64) = G_XOR %copy, %fold_cst
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%and:gpr(i64) = G_AND %fold_me, %bit
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%cmp:gpr(i32) = G_ICMP intpred(ne), %and(i64), %zero
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G_BRCOND %cmp, %bb.1
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G_BR %bb.0
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bb.1:
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RET_ReallyLR
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...
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---
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name: dont_flip_eq
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alignment: 4
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legalized: true
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regBankSelected: true
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body: |
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; CHECK-LABEL: name: dont_flip_eq
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64all = COPY $x0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %copy.sub_32
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
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; CHECK-NEXT: TBZW [[COPY1]], 3, %bb.1
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; CHECK-NEXT: B %bb.0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: RET_ReallyLR
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bb.0:
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successors: %bb.0, %bb.1
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liveins: $x0
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%copy:gpr(i64) = COPY $x0
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; Check bit 3.
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%bit:gpr(i64) = G_CONSTANT i64 8
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%zero:gpr(i64) = G_CONSTANT i64 0
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; 7 does not have the third bit set.
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%fold_cst:gpr(i64) = G_CONSTANT i64 7
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; This only has the third bit set if %copy does. So, to walk through this,
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; we should have a TBZW on %copy.
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%fold_me:gpr(i64) = G_XOR %fold_cst, %copy
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%and:gpr(i64) = G_AND %fold_me, %bit
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%cmp:gpr(i32) = G_ICMP intpred(eq), %and(i64), %zero
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G_BRCOND %cmp, %bb.1
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G_BR %bb.0
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bb.1:
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RET_ReallyLR
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...
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---
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name: dont_flip_eq_zext
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: dont_flip_eq_zext
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $wzr
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; CHECK-NEXT: [[ORNWrr:%[0-9]+]]:gpr32 = ORNWrr $wzr, [[COPY]]
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; CHECK-NEXT: [[ORRWrs:%[0-9]+]]:gpr32 = ORRWrs $wzr, [[ORNWrr]], 0
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; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG [[ORRWrs]], %subreg.sub_32
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; CHECK-NEXT: TBNZX [[SUBREG_TO_REG]], 63, %bb.1
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; CHECK-NEXT: B %bb.0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: RET_ReallyLR
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bb.0:
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successors: %bb.0(0x40000000), %bb.1(0x40000000)
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%1:gpr(i32) = G_CONSTANT i32 0
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%3:gpr(i32) = G_CONSTANT i32 -1
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%4:gpr(i32) = G_XOR %1, %3
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%5:gpr(i64) = G_ZEXT %4(i32)
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%15:gpr(i64) = G_CONSTANT i64 0
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%13:gpr(i32) = G_ICMP intpred(slt), %5(i64), %15
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G_BRCOND %13, %bb.1
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G_BR %bb.0
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bb.1:
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RET_ReallyLR
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...
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---
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name: dont_flip_ne
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alignment: 4
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legalized: true
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regBankSelected: true
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body: |
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; CHECK-LABEL: name: dont_flip_ne
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64all = COPY $x0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %copy.sub_32
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
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; CHECK-NEXT: TBNZW [[COPY1]], 3, %bb.1
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; CHECK-NEXT: B %bb.0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: RET_ReallyLR
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bb.0:
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successors: %bb.0, %bb.1
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liveins: $x0
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; Same as eq case, but we should get a TBNZW instead.
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%copy:gpr(i64) = COPY $x0
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%bit:gpr(i64) = G_CONSTANT i64 8
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%zero:gpr(i64) = G_CONSTANT i64 0
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%fold_cst:gpr(i64) = G_CONSTANT i64 7
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%fold_me:gpr(i64) = G_XOR %fold_cst, %copy
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%and:gpr(i64) = G_AND %fold_me, %bit
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%cmp:gpr(i32) = G_ICMP intpred(ne), %and(i64), %zero
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G_BRCOND %cmp, %bb.1
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G_BR %bb.0
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bb.1:
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RET_ReallyLR
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...
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---
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name: xor_chain
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alignment: 4
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legalized: true
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regBankSelected: true
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body: |
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; CHECK-LABEL: name: xor_chain
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64all = COPY $x0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %copy.sub_32
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
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; CHECK-NEXT: TBZW [[COPY1]], 3, %bb.1
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; CHECK-NEXT: B %bb.0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: RET_ReallyLR
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bb.0:
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successors: %bb.0, %bb.1
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liveins: $x0
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%copy:gpr(i64) = COPY $x0
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%bit:gpr(i64) = G_CONSTANT i64 8
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%zero:gpr(i64) = G_CONSTANT i64 0
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%fold_cst:gpr(i64) = G_CONSTANT i64 8
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; The G_XORs cancel each other out, so we should get a TBZW.
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%xor1:gpr(i64) = G_XOR %copy, %fold_cst
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%xor2:gpr(i64) = G_XOR %xor1, %fold_cst
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%and:gpr(i64) = G_AND %xor2, %bit
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%cmp:gpr(i32) = G_ICMP intpred(eq), %and(i64), %zero
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G_BRCOND %cmp, %bb.1
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G_BR %bb.0
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bb.1:
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RET_ReallyLR
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