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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-split-zero-stores.mir
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Flatten subprojects into a single base monorepo
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
...
---
name: v2s64_split
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $x0
; Split a store of <2 x i64> into two scalar stores.
; CHECK-LABEL: name: v2s64_split
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](i64)
; CHECK-NEXT: G_STORE [[C]](i64), [[COPY]](p0) :: (store (i64), align 16)
; CHECK-NEXT: G_STORE [[C]](i64), [[PTR_ADD]](p0) :: (store (i64) into unknown-address + 8)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%zero:_(s64) = G_CONSTANT i64 0
%zerovec:_(<2 x s64>) = G_BUILD_VECTOR %zero, %zero
G_STORE %zerovec(<2 x s64>), %0(p0) :: (store (<2 x s64>))
RET_ReallyLR
...
---
name: v4i32_split
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $x0
; CHECK-LABEL: name: v4i32_split
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](i64)
; CHECK-NEXT: G_STORE [[C]](i64), [[COPY]](p0) :: (store (i64), align 16)
; CHECK-NEXT: G_STORE [[C]](i64), [[PTR_ADD]](p0) :: (store (i64) into unknown-address + 8)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%zero:_(s32) = G_CONSTANT i32 0
%zerovec:_(<4 x s32>) = G_BUILD_VECTOR %zero, %zero, %zero, %zero
G_STORE %zerovec(<4 x s32>), %0(p0) :: (store (<4 x s32>))
RET_ReallyLR
...
---
name: v8i16_split
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $x0
; CHECK-LABEL: name: v8i16_split
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 0
; CHECK-NEXT: [[C1:%[0-9]+]]:_(i64) = G_CONSTANT i64 8
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](i64)
; CHECK-NEXT: G_STORE [[C]](i64), [[COPY]](p0) :: (store (i64), align 16)
; CHECK-NEXT: G_STORE [[C]](i64), [[PTR_ADD]](p0) :: (store (i64) into unknown-address + 8)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%zero:_(s16) = G_CONSTANT i16 0
%zerovec:_(<8 x s16>) = G_BUILD_VECTOR %zero, %zero, %zero, %zero, %zero, %zero, %zero, %zero
G_STORE %zerovec(<8 x s16>), %0(p0) :: (store (<8 x s16>))
RET_ReallyLR
...
# Negative tests
---
name: v2i32_nosplit
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $x0
; CHECK-LABEL: name: v2i32_nosplit
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %zerovec:_(<2 x s32>) = G_BUILD_VECTOR %zero(s32), %zero(s32)
; CHECK-NEXT: G_STORE %zerovec(<2 x s32>), [[COPY]](p0) :: (store (<2 x s32>))
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%zero:_(s32) = G_CONSTANT i32 0
%zerovec:_(<2 x s32>) = G_BUILD_VECTOR %zero, %zero
G_STORE %zerovec(<2 x s32>), %0(p0) :: (store (<2 x s32>))
RET_ReallyLR
...
---
name: multiple_uses
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $x0
; CHECK-LABEL: name: multiple_uses
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %zerovec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64)
; CHECK-NEXT: G_STORE %zerovec(<2 x s64>), [[COPY]](p0) :: (store (<2 x s64>))
; CHECK-NEXT: $q0 = COPY %zerovec(<2 x s64>)
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%zero:_(s64) = G_CONSTANT i64 0
%zerovec:_(<2 x s64>) = G_BUILD_VECTOR %zero, %zero
G_STORE %zerovec(<2 x s64>), %0(p0) :: (store (<2 x s64>))
$q0 = COPY %zerovec
RET_ReallyLR
...
---
name: truncating
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $x0
; CHECK-LABEL: name: truncating
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %zerovec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64)
; CHECK-NEXT: G_STORE %zerovec(<2 x s64>), [[COPY]](p0) :: (store (<2 x s32>))
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%zero:_(s64) = G_CONSTANT i64 0
%zerovec:_(<2 x s64>) = G_BUILD_VECTOR %zero, %zero
G_STORE %zerovec(<2 x s64>), %0(p0) :: (store (<2 x s32>))
RET_ReallyLR
...
---
name: volatile
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $x0
; CHECK-LABEL: name: volatile
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %zerovec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64)
; CHECK-NEXT: G_STORE %zerovec(<2 x s64>), [[COPY]](p0) :: (volatile store (<2 x s64>))
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%zero:_(s64) = G_CONSTANT i64 0
%zerovec:_(<2 x s64>) = G_BUILD_VECTOR %zero, %zero
G_STORE %zerovec(<2 x s64>), %0(p0) :: (volatile store (<2 x s64>))
RET_ReallyLR
...
---
name: s128_scalar
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $x0
; Split a store of <2 x i64> into two scalar stores.
; CHECK-LABEL: name: s128_scalar
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-NEXT: %zero:_(s128) = G_CONSTANT i128 0
; CHECK-NEXT: G_STORE %zero(s128), [[COPY]](p0) :: (store (s128))
; CHECK-NEXT: RET_ReallyLR
%0:_(p0) = COPY $x0
%zero:_(s128) = G_CONSTANT i128 0
G_STORE %zero(s128), %0(p0) :: (store (s128))
RET_ReallyLR
...
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