TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ptradd-chain.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64-apple-ios  -run-pass=aarch64-prelegalizer-combiner  %s -o - -verify-machineinstrs | FileCheck %s
# REQUIRES: asserts

# Check that we fold two adds of constant offsets with G_PTR_ADD into a single G_PTR_ADD.
---
name: ptradd_chain
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: ptradd_chain
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
    ; CHECK-NEXT: $x0 = COPY [[PTR_ADD]](p0)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %0:_(p0) = COPY $x0
    %1:_(s64) = G_CONSTANT i64 4
    %2:_(s64) = G_CONSTANT i64 12
    %3:_(p0) = G_PTR_ADD %0(p0), %1
    %4:_(p0) = G_PTR_ADD %3(p0), %2
    $x0 = COPY %4(p0)
    RET_ReallyLR implicit $x0
...
---
name: ptradd_chain_2
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $x0
    ; CHECK-LABEL: name: ptradd_chain_2
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 28
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
    ; CHECK-NEXT: $x0 = COPY [[PTR_ADD]](p0)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %0:_(p0) = COPY $x0
    %1:_(s64) = G_CONSTANT i64 4
    %2:_(s64) = G_CONSTANT i64 12
    %3:_(p0) = G_PTR_ADD %0(p0), %1
    %4:_(p0) = G_PTR_ADD %3(p0), %2
    %5:_(p0) = G_PTR_ADD %4(p0), %2
    $x0 = COPY %5(p0)
    RET_ReallyLR implicit $x0
...
---
name: ptradd_chain_lookthough
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $x0
    ; CHECK-LABEL: name: ptradd_chain_lookthough
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 28
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
    ; CHECK-NEXT: $x0 = COPY [[PTR_ADD]](p0)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %0:_(p0) = COPY $x0
    %1:_(s64) = G_CONSTANT i64 4
    %2:_(s64) = G_CONSTANT i64 12
    %6:_(s32) = G_TRUNC %2(s64)
    %7:_(s64) = G_SEXT %6(s32)
    %3:_(p0) = G_PTR_ADD %0(p0), %1
    %4:_(p0) = G_PTR_ADD %3(p0), %2
    %5:_(p0) = G_PTR_ADD %4(p0), %7
    $x0 = COPY %5(p0)
    RET_ReallyLR implicit $x0
...
---
name: ptradd_would_form_illegal_load_addressing
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: ptradd_would_form_illegal_load_addressing
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4096
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C1]](s64)
    ; CHECK-NEXT: %ld:_(s64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64))
    ; CHECK-NEXT: %ld_other:_(s64) = G_LOAD [[PTR_ADD]](p0) :: (load (s64))
    ; CHECK-NEXT: $x0 = COPY %ld(s64)
    ; CHECK-NEXT: $x1 = COPY %ld_other(s64)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %0:_(p0) = COPY $x0
    %1:_(s64) = G_CONSTANT i64 4
    %2:_(s64) = G_CONSTANT i64 4096
    %3:_(p0) = G_PTR_ADD %0(p0), %1
    %4:_(p0) = G_PTR_ADD %3(p0), %2
    %ld:_(s64) = G_LOAD %4(p0) :: (load 8)
    %ld_other:_(s64) = G_LOAD %3(p0) :: (load 8)
    $x0 = COPY %ld(s64)
    $x1 = COPY %ld_other(s64)
    RET_ReallyLR implicit $x0
...
---
name: ptradd_would_form_illegal_load_addressing_wrong_orig_immed
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $x0

    ; CHECK-LABEL: name: ptradd_would_form_illegal_load_addressing_wrong_orig_immed
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1600136
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C1]](s64)
    ; CHECK-NEXT: %ld:_(s64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64))
    ; CHECK-NEXT: %ld_other:_(s64) = G_LOAD [[PTR_ADD]](p0) :: (load (s64))
    ; CHECK-NEXT: $x0 = COPY %ld(s64)
    ; CHECK-NEXT: $x1 = COPY %ld_other(s64)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %0:_(p0) = COPY $x0
    %1:_(s64) = G_CONSTANT i64 1600136
    %2:_(s64) = G_CONSTANT i64 8
    %3:_(p0) = G_PTR_ADD %0(p0), %1
    %4:_(p0) = G_PTR_ADD %3(p0), %2
    %ld:_(s64) = G_LOAD %4(p0) :: (load 8)
    %ld_other:_(s64) = G_LOAD %3(p0) :: (load 8)
    $x0 = COPY %ld(s64)
    $x1 = COPY %ld_other(s64)
    RET_ReallyLR implicit $x0
...
---
# PR58906
name: ptradd_constant_type_mismatch
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $x0, $x1

    ; CHECK-LABEL: name: ptradd_constant_type_mismatch
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[COPY1]](s64)
    ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C]](s64)
    ; CHECK-NEXT: %ld:_(s64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64))
    ; CHECK-NEXT: $x0 = COPY %ld(s64)
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    %0:_(p0) = COPY $x0
    %1:_(s64) = COPY $x1
    %2:_(s32) = G_CONSTANT i32 8
    %3:_(s64) = G_ZEXT %2:_(s32)
    %4:_(p0) = G_PTR_ADD %0:_, %3:_(s64)
    %5:_(p0) = G_PTR_ADD %4:_, %1:_(s64)
    %ld:_(s64) = G_LOAD %5(p0) :: (load 8)
    $x0 = COPY %ld(s64)
    RET_ReallyLR implicit $x0
...