derek.holloway
7502bf64a4
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320 lines
8.8 KiB
YAML
320 lines
8.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
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name: uitofp_to_zero
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: uitofp_to_zero
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
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; CHECK: $s0 = COPY [[C]](s32)
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; CHECK: RET_ReallyLR implicit $s0
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%0:_(s32) = G_IMPLICIT_DEF
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%1:_(s32) = G_UITOFP %0(s32)
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$s0 = COPY %1(s32)
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RET_ReallyLR implicit $s0
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...
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---
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name: sitofp_to_zero
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: sitofp_to_zero
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
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; CHECK-NEXT: $s0 = COPY [[C]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $s0
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%0:_(s32) = G_IMPLICIT_DEF
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%1:_(s32) = G_SITOFP %0(s32)
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$s0 = COPY %1(s32)
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RET_ReallyLR implicit $s0
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...
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---
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name: and_to_zero
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: and_to_zero
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: $w0 = COPY [[C]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(s32) = G_CONSTANT i32 10
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%1:_(s32) = G_IMPLICIT_DEF
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%2:_(s32) = G_AND %0, %1
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: mul_to_zero
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: mul_to_zero
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: $w0 = COPY [[C]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(s32) = G_CONSTANT i32 10
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%1:_(s32) = G_IMPLICIT_DEF
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%2:_(s32) = G_MUL %0, %1
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: or_to_negative_one
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: or_to_negative_one
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
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; CHECK-NEXT: $w0 = COPY [[C]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(s32) = G_CONSTANT i32 10
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%1:_(s32) = G_IMPLICIT_DEF
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%2:_(s32) = G_OR %0, %1
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: xor_to_undef
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: xor_to_undef
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK-NEXT: $w0 = COPY [[DEF]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(s32) = G_CONSTANT i32 10
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%1:_(s32) = G_IMPLICIT_DEF
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%2:_(s32) = G_XOR %0, %1
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: add_to_undef
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: add_to_undef
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK-NEXT: $w0 = COPY [[DEF]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(s32) = G_CONSTANT i32 10
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%1:_(s32) = G_IMPLICIT_DEF
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%2:_(s32) = G_ADD %0, %1
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: sub_to_undef
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: sub_to_undef
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK-NEXT: $w0 = COPY [[DEF]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(s32) = G_CONSTANT i32 10
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%1:_(s32) = G_IMPLICIT_DEF
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%2:_(s32) = G_SUB %0, %1
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: fptoui_to_undef
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: fptoui_to_undef
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK-NEXT: $w0 = COPY [[DEF]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(s32) = G_IMPLICIT_DEF
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%1:_(s32) = G_FPTOUI %0(s32)
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$w0 = COPY %1(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: fptosi_to_undef
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: fptosi_to_undef
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK-NEXT: $w0 = COPY [[DEF]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(s32) = G_IMPLICIT_DEF
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%1:_(s32) = G_FPTOSI %0(s32)
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$w0 = COPY %1(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: shufflevector_undef_ops_to_undef
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: shufflevector_undef_ops_to_undef
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; CHECK: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
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; CHECK-NEXT: $d0 = COPY [[DEF]](<2 x s32>)
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; CHECK-NEXT: RET_ReallyLR implicit $d0
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%1:_(<2 x s32>) = G_IMPLICIT_DEF
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%2:_(<2 x s32>) = G_IMPLICIT_DEF
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%0:_(<2 x s32>) = G_SHUFFLE_VECTOR %1(<2 x s32>), %2(<2 x s32>), shufflemask(0, 1)
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$d0 = COPY %0(<2 x s32>)
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RET_ReallyLR implicit $d0
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...
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---
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name: shufflevector_undef_mask_to_undef
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $d0, $d1
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; CHECK-LABEL: name: shufflevector_undef_mask_to_undef
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; CHECK: liveins: $d0, $d1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
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; CHECK-NEXT: $d0 = COPY [[DEF]](<2 x s32>)
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; CHECK-NEXT: RET_ReallyLR implicit $d0
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%0:_(<2 x s32>) = COPY $d0
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%1:_(<2 x s32>) = COPY $d1
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%2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1, shufflemask(undef, undef)
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$d0 = COPY %2(<2 x s32>)
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RET_ReallyLR implicit $d0
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...
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---
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name: shufflevector_not_all_ops_undef
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $d0
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; Show that we don't do the combine when one of the vectors is not a G_IMPLICIT_DEF.
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; CHECK-LABEL: name: shufflevector_not_all_ops_undef
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; CHECK: liveins: $d0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
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; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<2 x s32>) = G_SHUFFLE_VECTOR [[DEF]](<2 x s32>), [[COPY]], shufflemask(0, 1)
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; CHECK-NEXT: $d0 = COPY [[SHUF]](<2 x s32>)
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; CHECK-NEXT: RET_ReallyLR implicit $d0
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%1:_(<2 x s32>) = G_IMPLICIT_DEF
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%2:_(<2 x s32>) = COPY $d0
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%0:_(<2 x s32>) = G_SHUFFLE_VECTOR %1(<2 x s32>), %2(<2 x s32>), shufflemask(0, 1)
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$d0 = COPY %0(<2 x s32>)
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RET_ReallyLR implicit $d0
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...
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---
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name: shl_undef_rhs
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: shl_undef_rhs
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK-NEXT: $x0 = COPY [[DEF]](s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%0:_(s64) = G_CONSTANT i64 10
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%1:_(s64) = G_IMPLICIT_DEF
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%2:_(s64) = G_SHL %0, %1
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$x0 = COPY %2(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: lshr_undef_rhs
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: lshr_undef_rhs
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK-NEXT: $x0 = COPY [[DEF]](s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%0:_(s64) = G_CONSTANT i64 10
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%1:_(s64) = G_IMPLICIT_DEF
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%2:_(s64) = G_LSHR %0, %1
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$x0 = COPY %2(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: ashr_undef_rhs
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: ashr_undef_rhs
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK-NEXT: $x0 = COPY [[DEF]](s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%0:_(s64) = G_CONSTANT i64 10
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%1:_(s64) = G_IMPLICIT_DEF
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%2:_(s64) = G_ASHR %0, %1
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$x0 = COPY %2(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: lshr_undef_lhs
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; Optimize these to zero?
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; CHECK-LABEL: name: lshr_undef_lhs
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 10
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; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[DEF]], [[C]](s64)
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; CHECK-NEXT: $x0 = COPY [[LSHR]](s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%0:_(s64) = G_CONSTANT i64 10
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%1:_(s64) = G_IMPLICIT_DEF
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%2:_(s64) = G_LSHR %1, %0
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$x0 = COPY %2(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: ashr_undef_lhs
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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; Optimize these to zero?
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; CHECK-LABEL: name: ashr_undef_lhs
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 10
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; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[DEF]], [[C]](s64)
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; CHECK-NEXT: $x0 = COPY [[ASHR]](s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%0:_(s64) = G_CONSTANT i64 10
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%1:_(s64) = G_IMPLICIT_DEF
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%2:_(s64) = G_ASHR %1, %0
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$x0 = COPY %2(s64)
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RET_ReallyLR implicit $x0
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...
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