derek.holloway
7502bf64a4
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467 lines
16 KiB
YAML
467 lines
16 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple arm64-- -run-pass=regbankselect %s -o - | FileCheck %s
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# Check that we correctly assign register banks based off of instructions which
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# only use or only define FPRs.
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#
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# For example, G_SITOFP may take in a GPR, but only ever produces values on FPRs.
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# Some instructions can have inputs/outputs on either FPRs or GPRs. If one of
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# those instructions takes in the result of a G_SITOFP as a source, we should
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# put that source on a FPR.
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#
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# Similarly, G_FPTOSI can only take in a value on a FPR. So, if the result of
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# an instruction is consumed by a G_FPTOSI, we should put the instruction on
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# FPRs.
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---
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name: load_only_uses_fp
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: load_only_uses_fp
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0
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; CHECK-NEXT: [[C:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 2.000000e+00
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; CHECK-NEXT: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load (s32))
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; CHECK-NEXT: [[FCMP:%[0-9]+]]:gpr(s32) = G_FCMP floatpred(uno), [[C]](s32), [[LOAD]]
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; CHECK-NEXT: $w0 = COPY [[FCMP]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(p0) = COPY $x0
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%1:_(s32) = G_FCONSTANT float 2.0
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%2:_(s32) = G_LOAD %0 :: (load (s32))
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%3:_(s32) = G_FCMP floatpred(uno), %1, %2
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$w0 = COPY %3(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: unmerge_only_uses_fp
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: unmerge_only_uses_fp
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr(i64) = COPY [[COPY]](s64)
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; CHECK-NEXT: [[UV:%[0-9]+]]:fpr(s32), [[UV1:%[0-9]+]]:fpr(s32) = G_UNMERGE_VALUES [[COPY1]](i64)
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; CHECK-NEXT: [[FCMP:%[0-9]+]]:gpr(s32) = G_FCMP floatpred(uno), [[UV]](s32), [[UV1]]
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; CHECK-NEXT: $w0 = COPY [[FCMP]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(s64) = COPY $x0
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%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0(s64)
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%3:_(s32) = G_FCMP floatpred(uno), %1, %2
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$w0 = COPY %3(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: store_defined_by_fp
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0, $w1
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; CHECK-LABEL: name: store_defined_by_fp
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; CHECK: liveins: $x0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr(s32) = COPY $w1
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; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fpr(s32) = G_SITOFP [[COPY1]](s32)
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; CHECK-NEXT: G_STORE [[SITOFP]](s32), [[COPY]](p0) :: (store (s32))
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%0:_(p0) = COPY $x0
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%1:_(s32) = COPY $w1
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%2:_(s32) = G_SITOFP %1
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G_STORE %2, %0 :: (store (s32))
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...
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---
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name: select_defined_by_fp_using_fp
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1, $w2
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; CHECK-LABEL: name: select_defined_by_fp_using_fp
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; CHECK: liveins: $w0, $w1, $w2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr(s32) = COPY $w1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr(s32) = COPY $w2
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; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fpr(s32) = G_SITOFP [[COPY1]](s32)
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr(i32) = COPY [[COPY2]](s32)
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; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s32) = G_SELECT [[COPY2]](s32), [[COPY3]], [[SITOFP]]
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; CHECK-NEXT: [[FPTOSI:%[0-9]+]]:fpr(s32) = G_FPTOSI [[SELECT]](s32)
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%0:_(s32) = COPY $w0
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%2:_(s32) = COPY $w1
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%3:_(s32) = COPY $w2
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%4:_(s32) = G_SITOFP %2
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%6:_(s32) = G_SELECT %3, %3, %4
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%8:_(s32) = G_FPTOSI %6
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...
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---
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name: load_used_by_phi_fpr
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legalized: true
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: load_used_by_phi_fpr
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
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; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0
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; CHECK-NEXT: %ptr:gpr(p0) = COPY $x0
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; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
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; CHECK-NEXT: G_BR %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.2(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %load:fpr(s32) = G_LOAD %ptr(p0) :: (load (s32))
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; CHECK-NEXT: G_BR %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: %phi:fpr(s32) = G_PHI %fpr_copy(s32), %bb.0, %load(s32), %bb.1
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; CHECK-NEXT: $s0 = COPY %phi(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $s0
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bb.0:
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successors: %bb.1(0x40000000), %bb.2(0x40000000)
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liveins: $x0, $s0, $s1, $w0, $w1
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%cond_wide:_(s32) = COPY $w0
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%fpr_copy:_(s32) = COPY $s0
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%ptr:_(p0) = COPY $x0
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G_BRCOND %cond_wide, %bb.1
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G_BR %bb.2
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bb.1:
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successors: %bb.2
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%load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
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G_BR %bb.2
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bb.2:
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%phi:_(s32) = G_PHI %fpr_copy(s32), %bb.0, %load(s32), %bb.1
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$s0 = COPY %phi(s32)
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RET_ReallyLR implicit $s0
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...
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---
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name: load_used_by_phi_gpr_copy_gpr
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legalized: true
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: load_used_by_phi_gpr_copy_gpr
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
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; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1
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; CHECK-NEXT: %ptr:gpr(p0) = COPY $x0
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; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
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; CHECK-NEXT: G_BR %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.2(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %load:gpr(s32) = G_LOAD %ptr(p0) :: (load (s32))
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; CHECK-NEXT: G_BR %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: %phi:gpr(s32) = G_PHI %gpr_copy(s32), %bb.0, %load(s32), %bb.1
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; CHECK-NEXT: $w2 = COPY %phi(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w2
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bb.0:
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successors: %bb.1(0x40000000), %bb.2(0x40000000)
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liveins: $x0, $s0, $s1, $w0, $w1
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%cond_wide:_(s32) = COPY $w0
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%gpr_copy:_(s32) = COPY $w1
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%ptr:_(p0) = COPY $x0
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G_BRCOND %cond_wide, %bb.1
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G_BR %bb.2
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bb.1:
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successors: %bb.2
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%load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
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G_BR %bb.2
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bb.2:
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%phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %load(s32), %bb.1
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$w2 = COPY %phi(s32)
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RET_ReallyLR implicit $w2
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...
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---
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name: load_used_by_phi_gpr_copy_fpr
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legalized: true
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: load_used_by_phi_gpr_copy_fpr
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
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; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1
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; CHECK-NEXT: %ptr:gpr(p0) = COPY $x0
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; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
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; CHECK-NEXT: G_BR %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.2(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %load:fpr(s32) = G_LOAD %ptr(p0) :: (load (s32))
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; CHECK-NEXT: G_BR %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: %phi:gpr(s32) = G_PHI %gpr_copy(s32), %bb.0, %load(s32), %bb.1
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; CHECK-NEXT: $s0 = COPY %phi(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $s0
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bb.0:
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successors: %bb.1(0x40000000), %bb.2(0x40000000)
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liveins: $x0, $s0, $s1, $w0, $w1
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%cond_wide:_(s32) = COPY $w0
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%gpr_copy:_(s32) = COPY $w1
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%ptr:_(p0) = COPY $x0
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G_BRCOND %cond_wide, %bb.1
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G_BR %bb.2
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bb.1:
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successors: %bb.2
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%load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
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G_BR %bb.2
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bb.2:
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%phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %load(s32), %bb.1
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$s0 = COPY %phi(s32) ; G_LOAD should consider this FPR constraint and assign %load FPR
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RET_ReallyLR implicit $s0
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...
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---
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name: select_used_by_phi_fpr
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legalized: true
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: select_used_by_phi_fpr
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
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; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0
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; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1
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; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
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; CHECK-NEXT: G_BR %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.2(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(i32) = COPY %gpr_copy(s32)
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; CHECK-NEXT: %select:fpr(s32) = G_SELECT %cond_wide(s32), %fpr_copy, [[COPY]]
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; CHECK-NEXT: G_BR %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: %phi:fpr(s32) = G_PHI %fpr_copy(s32), %bb.0, %select(s32), %bb.1
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; CHECK-NEXT: $w0 = COPY %phi(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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; The G_SELECT and G_PHI should end up with the same register bank.
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bb.0:
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successors: %bb.1(0x40000000), %bb.2(0x40000000)
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liveins: $s0, $s1, $w0, $w1
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%cond_wide:_(s32) = COPY $w0
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%fpr_copy:_(s32) = COPY $s0
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%gpr_copy:_(s32) = COPY $w1
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G_BRCOND %cond_wide, %bb.1
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G_BR %bb.2
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bb.1:
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successors: %bb.2
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%select:_(s32) = G_SELECT %cond_wide, %fpr_copy, %gpr_copy
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G_BR %bb.2
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bb.2:
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%phi:_(s32) = G_PHI %fpr_copy(s32), %bb.0, %select(s32), %bb.1
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$w0 = COPY %phi(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: select_used_by_phi_gpr
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legalized: true
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: select_used_by_phi_gpr
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
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; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0
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; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1
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; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
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; CHECK-NEXT: G_BR %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.2(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(i32) = COPY %fpr_copy(s32)
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; CHECK-NEXT: %select:gpr(s32) = G_SELECT %cond_wide(s32), [[COPY]], %gpr_copy
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; CHECK-NEXT: G_BR %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: %phi:gpr(s32) = G_PHI %gpr_copy(s32), %bb.0, %select(s32), %bb.1
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; CHECK-NEXT: $s0 = COPY %phi(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $s0
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; The G_SELECT and G_PHI should end up with the same register bank.
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bb.0:
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successors: %bb.1(0x40000000), %bb.2(0x40000000)
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liveins: $s0, $s1, $w0, $w1
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%cond_wide:_(s32) = COPY $w0
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%fpr_copy:_(s32) = COPY $s0
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%gpr_copy:_(s32) = COPY $w1
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G_BRCOND %cond_wide, %bb.1
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G_BR %bb.2
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bb.1:
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successors: %bb.2
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%select:_(s32) = G_SELECT %cond_wide, %fpr_copy, %gpr_copy
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G_BR %bb.2
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bb.2:
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%phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %select(s32), %bb.1
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$s0 = COPY %phi(s32)
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RET_ReallyLR implicit $s0
|
|
|
|
|
|
...
|
|
---
|
|
name: unmerge_used_by_phi_fpr
|
|
legalized: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
; CHECK-LABEL: name: unmerge_used_by_phi_fpr
|
|
; CHECK: bb.0:
|
|
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
|
; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
|
|
; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0
|
|
; CHECK-NEXT: %unmerge_src:gpr(s64) = COPY $x0
|
|
; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
|
|
; CHECK-NEXT: G_BR %bb.2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.1:
|
|
; CHECK-NEXT: successors: %bb.2(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(i64) = COPY %unmerge_src(s64)
|
|
; CHECK-NEXT: %unmerge_1:fpr(s32), %unmerge_2:fpr(s32) = G_UNMERGE_VALUES [[COPY]](i64)
|
|
; CHECK-NEXT: G_BR %bb.2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.2:
|
|
; CHECK-NEXT: %phi:fpr(s32) = G_PHI %fpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1
|
|
; CHECK-NEXT: $s0 = COPY %phi(s32)
|
|
; CHECK-NEXT: RET_ReallyLR implicit $s0
|
|
bb.0:
|
|
successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
|
liveins: $x0, $s0, $s1, $w0, $w1
|
|
%cond_wide:_(s32) = COPY $w0
|
|
|
|
%fpr_copy:_(s32) = COPY $s0
|
|
%unmerge_src:_(s64) = COPY $x0
|
|
G_BRCOND %cond_wide, %bb.1
|
|
G_BR %bb.2
|
|
bb.1:
|
|
successors: %bb.2
|
|
%unmerge_1:_(s32), %unmerge_2:_(s32) = G_UNMERGE_VALUES %unmerge_src(s64)
|
|
G_BR %bb.2
|
|
bb.2:
|
|
%phi:_(s32) = G_PHI %fpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1
|
|
$s0 = COPY %phi(s32)
|
|
RET_ReallyLR implicit $s0
|
|
|
|
...
|
|
---
|
|
name: unmerge_used_by_phi_gpr
|
|
legalized: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
; CHECK-LABEL: name: unmerge_used_by_phi_gpr
|
|
; CHECK: bb.0:
|
|
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
|
; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
|
|
; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1
|
|
; CHECK-NEXT: %unmerge_src:gpr(s64) = COPY $x0
|
|
; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
|
|
; CHECK-NEXT: G_BR %bb.2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.1:
|
|
; CHECK-NEXT: successors: %bb.2(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %unmerge_1:gpr(s32), %unmerge_2:gpr(s32) = G_UNMERGE_VALUES %unmerge_src(s64)
|
|
; CHECK-NEXT: G_BR %bb.2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.2:
|
|
; CHECK-NEXT: %phi:gpr(s32) = G_PHI %gpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1
|
|
; CHECK-NEXT: $s0 = COPY %phi(s32)
|
|
; CHECK-NEXT: RET_ReallyLR implicit $s0
|
|
bb.0:
|
|
successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
|
liveins: $x0, $s0, $s1, $w0, $w1
|
|
%cond_wide:_(s32) = COPY $w0
|
|
%gpr_copy:_(s32) = COPY $w1
|
|
%unmerge_src:_(s64) = COPY $x0
|
|
G_BRCOND %cond_wide, %bb.1
|
|
G_BR %bb.2
|
|
bb.1:
|
|
successors: %bb.2
|
|
%unmerge_1:_(s32), %unmerge_2:_(s32) = G_UNMERGE_VALUES %unmerge_src(s64)
|
|
G_BR %bb.2
|
|
bb.2:
|
|
%phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1
|
|
$s0 = COPY %phi(s32)
|
|
RET_ReallyLR implicit $s0
|
|
|
|
...
|
|
---
|
|
name: load_used_by_sitofp
|
|
legalized: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
liveins: $x0
|
|
; The load should be assigned an fpr bank because it's used by the sitofp.
|
|
; The sitofp should assign both src and dest to FPR, resulting in no copies.
|
|
; CHECK-LABEL: name: load_used_by_sitofp
|
|
; CHECK: liveins: $x0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0
|
|
; CHECK-NEXT: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load (s32))
|
|
; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fpr(s32) = G_SITOFP [[LOAD]](s32)
|
|
; CHECK-NEXT: $s0 = COPY [[SITOFP]](s32)
|
|
; CHECK-NEXT: RET_ReallyLR implicit $s0
|
|
%0:_(p0) = COPY $x0
|
|
%1:_(s32) = G_LOAD %0 :: (load (s32))
|
|
%2:_(s32) = G_SITOFP %1:_(s32)
|
|
$s0 = COPY %2(s32)
|
|
RET_ReallyLR implicit $s0
|
|
...
|
|
---
|
|
name: load_used_by_uitofp
|
|
legalized: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
liveins: $x0
|
|
; CHECK-LABEL: name: load_used_by_uitofp
|
|
; CHECK: liveins: $x0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0
|
|
; CHECK-NEXT: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load (s32))
|
|
; CHECK-NEXT: [[UITOFP:%[0-9]+]]:fpr(s32) = G_UITOFP [[LOAD]](s32)
|
|
; CHECK-NEXT: $s0 = COPY [[UITOFP]](s32)
|
|
; CHECK-NEXT: RET_ReallyLR implicit $s0
|
|
%0:_(p0) = COPY $x0
|
|
%1:_(s32) = G_LOAD %0 :: (load (s32))
|
|
%2:_(s32) = G_UITOFP %1:_(s32)
|
|
$s0 = COPY %2(s32)
|
|
RET_ReallyLR implicit $s0
|
|
...
|