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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/GlobalISel/regbank-intrinsic-trunc.mir
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc %s -verify-machineinstrs -mtriple aarch64-unknown-unknown -run-pass=regbankselect -o - | FileCheck %s
...
---
name: test_f32.intrinsic_trunc
alignment: 4
legalized: true
tracksRegLiveness: true
frameInfo:
maxCallFrameSize: 0
machineFunctionInfo: {}
body: |
bb.0:
liveins: $s0
; CHECK-LABEL: name: test_f32.intrinsic_trunc
; CHECK: liveins: $s0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0
; CHECK-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:fpr(s32) = G_INTRINSIC_TRUNC [[COPY]]
; CHECK-NEXT: $s0 = COPY [[INTRINSIC_TRUNC]](s32)
; CHECK-NEXT: RET_ReallyLR implicit $s0
%0:_(s32) = COPY $s0
%1:_(s32) = G_INTRINSIC_TRUNC %0
$s0 = COPY %1(s32)
RET_ReallyLR implicit $s0
...
---
name: test_f64.intrinsic_trunc
alignment: 4
legalized: true
tracksRegLiveness: true
frameInfo:
maxCallFrameSize: 0
machineFunctionInfo: {}
body: |
bb.0:
liveins: $d0
; CHECK-LABEL: name: test_f64.intrinsic_trunc
; CHECK: liveins: $d0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(s64) = COPY $d0
; CHECK-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:fpr(s64) = G_INTRINSIC_TRUNC [[COPY]]
; CHECK-NEXT: $d0 = COPY [[INTRINSIC_TRUNC]](s64)
; CHECK-NEXT: RET_ReallyLR implicit $d0
%0:_(s64) = COPY $d0
%1:_(s64) = G_INTRINSIC_TRUNC %0
$d0 = COPY %1(s64)
RET_ReallyLR implicit $d0