derek.holloway
7502bf64a4
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215 lines
6.5 KiB
YAML
215 lines
6.5 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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...
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---
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name: fold
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; This should not have an UBFMXri, since ADDWrr implicitly gives us the
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; zext.
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; CHECK-LABEL: name: fold
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK-NEXT: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY1]], [[COPY]]
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; CHECK-NEXT: [[ORRWrs:%[0-9]+]]:gpr32 = ORRWrs $wzr, [[ADDWrr]], 0
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; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG [[ORRWrs]], %subreg.sub_32
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; CHECK-NEXT: $x0 = COPY [[SUBREG_TO_REG]]
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%0:gpr(i32) = COPY $w0
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%1:gpr(i32) = COPY $w1
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%2:gpr(i32) = G_ADD %1, %0
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%3:gpr(i64) = G_ZEXT %2(i32)
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$x0 = COPY %3(i64)
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RET_ReallyLR implicit $x0
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...
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---
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name: dont_fold_s16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; We should have a UBFMXri here, because we only do this for zero extends
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; from 32 bits to 64 bits.
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; CHECK-LABEL: name: dont_fold_s16
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
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; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG [[DEF]], %subreg.sub_32
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; CHECK-NEXT: [[UBFMXri:%[0-9]+]]:gpr64 = UBFMXri [[SUBREG_TO_REG]], 0, 15
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; CHECK-NEXT: $x0 = COPY [[UBFMXri]]
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%0:gpr(s16) = G_IMPLICIT_DEF
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%3:gpr(i64) = G_ZEXT %0(s16)
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$x0 = COPY %3(i64)
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RET_ReallyLR implicit $x0
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...
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---
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name: dont_fold_copy
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0
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; We should have a ORRWrs here, because isDef32 disallows copies.
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; CHECK-LABEL: name: dont_fold_copy
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; CHECK: liveins: $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr32 = COPY $w0
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; CHECK-NEXT: [[ORRWrs:%[0-9]+]]:gpr32 = ORRWrs $wzr, %copy, 0
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; CHECK-NEXT: %zext:gpr64 = SUBREG_TO_REG [[ORRWrs]], %subreg.sub_32
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; CHECK-NEXT: $x0 = COPY %zext
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%copy:gpr(i32) = COPY $w0
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%zext:gpr(i64) = G_ZEXT %copy(i32)
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$x0 = COPY %zext(i64)
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RET_ReallyLR implicit $x0
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...
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---
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name: dont_fold_bitcast
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0
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; We should have a ORRWrs here, because isDef32 disallows bitcasts.
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; CHECK-LABEL: name: dont_fold_bitcast
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; CHECK: liveins: $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr32all = COPY $w0
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; CHECK-NEXT: %bitcast1:gpr32 = COPY %copy
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; CHECK-NEXT: [[ORRWrs:%[0-9]+]]:gpr32 = ORRWrs $wzr, %bitcast1, 0
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; CHECK-NEXT: %zext:gpr64 = SUBREG_TO_REG [[ORRWrs]], %subreg.sub_32
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; CHECK-NEXT: $x0 = COPY %zext
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%copy:gpr(i32) = COPY $w0
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%bitcast0:gpr(<4 x s8>) = G_BITCAST %copy(i32)
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%bitcast1:gpr(i32) = G_BITCAST %bitcast0
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%zext:gpr(i64) = G_ZEXT %bitcast1(i32)
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$x0 = COPY %zext(i64)
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RET_ReallyLR implicit $x0
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...
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---
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name: dont_fold_trunc
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; We should have a ORRWrs here, because isDef32 disallows truncs.
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; CHECK-LABEL: name: dont_fold_trunc
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64sp = COPY $x0
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; CHECK-NEXT: %trunc:gpr32common = COPY %copy.sub_32
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; CHECK-NEXT: [[ORRWrs:%[0-9]+]]:gpr32 = ORRWrs $wzr, %trunc, 0
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; CHECK-NEXT: %zext:gpr64 = SUBREG_TO_REG [[ORRWrs]], %subreg.sub_32
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; CHECK-NEXT: $x0 = COPY %zext
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%copy:gpr(i64) = COPY $x0
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%trunc:gpr(i32) = G_TRUNC %copy(i64)
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%zext:gpr(i64) = G_ZEXT %trunc(i32)
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$x0 = COPY %zext(i64)
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RET_ReallyLR implicit $x0
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...
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---
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name: dont_fold_phi
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: dont_fold_phi
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK-NEXT: liveins: $w0, $w1, $w2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy1:gpr32all = COPY $w0
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; CHECK-NEXT: %copy2:gpr32all = COPY $w1
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; CHECK-NEXT: %cond_wide:gpr32 = COPY $w2
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; CHECK-NEXT: TBNZW %cond_wide, 0, %bb.1
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; CHECK-NEXT: B %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.2(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: %phi:gpr32 = PHI %copy1, %bb.0, %copy2, %bb.1
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; CHECK-NEXT: [[ORRWrs:%[0-9]+]]:gpr32 = ORRWrs $wzr, %phi, 0
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; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG [[ORRWrs]], %subreg.sub_32
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; CHECK-NEXT: $x0 = COPY [[SUBREG_TO_REG]]
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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; We should have a ORRWrs here, because isDef32 disallows phis.
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bb.0:
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liveins: $w0, $w1, $w2
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%copy1:gpr(i32) = COPY $w0
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%copy2:gpr(i32) = COPY $w1
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%cond_wide:gpr(i32) = COPY $w2
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G_BRCOND %cond_wide, %bb.1
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G_BR %bb.2
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bb.1:
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bb.2:
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%phi:gpr(i32) = G_PHI %copy1(i32), %bb.0, %copy2(i32), %bb.1
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%5:gpr(i64) = G_ZEXT %phi(i32)
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$x0 = COPY %5(i64)
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RET_ReallyLR implicit $x0
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...
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---
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name: dont_look_through_copy
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; Make sure we don't walk past the copy.
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; CHECK-LABEL: name: dont_look_through_copy
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK-NEXT: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY1]], [[COPY]]
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; CHECK-NEXT: [[ORRWrs:%[0-9]+]]:gpr32 = ORRWrs $wzr, [[ADDWrr]], 0
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; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG [[ORRWrs]], %subreg.sub_32
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; CHECK-NEXT: $x0 = COPY [[SUBREG_TO_REG]]
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%0:gpr(i32) = COPY $w0
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%1:gpr(i32) = COPY $w1
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%2:gpr(i32) = G_ADD %1, %0
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%3:gpr(i32) = COPY %2(i32)
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%4:gpr(i64) = G_ZEXT %3(i32)
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$x0 = COPY %4(i64)
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RET_ReallyLR implicit $x0
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