derek.holloway
7502bf64a4
CodeQL / Analyze (actions) (push) Canceled after 0s
CodeQL / Analyze (python) (push) Canceled after 0s
pre-commit / pre-commit (push) Canceled after 0s
Multi-Arch CI / setup (push) Canceled after 0s
Publish build_manylinux_x86_64 images / publish_build_manylinux_x86_64 (push) Canceled after 0s
Setup (Multi-Arch) / setup (push) Canceled after 0s
Multi-Arch CI / Linux::${{ fromJSON(needs.setup.outputs.linux_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubi10 image / publish_no_rocm_image_ubi10 (push) Canceled after 0s
Multi-Arch CI / Windows::${{ fromJSON(needs.setup.outputs.windows_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Multi-Arch CI / Manifest Diff (push) Canceled after 0s
TheRock Manifest Diff Report / Generate Manifest Diff Report (push) Canceled after 0s
Multi-Arch CI / CI Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_ocl_rt images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_rocgdb images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Unit Tests / Unit Tests :: ubuntu-24.04 (push) Canceled after 0s
Unit Tests / Unit Tests :: windows-2022 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_media (push) Canceled after 0s
Unit Tests / Unit Tests Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_openmpi (push) Canceled after 0s
280 lines
7.3 KiB
YAML
280 lines
7.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
|
# RUN: llc -mtriple aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
|
|
#
|
|
# Test selecting G_REV instructions.
|
|
#
|
|
# Each test is named like:
|
|
#
|
|
# (G_REV_VERSION)_(INSTRUCTION_PRODUCED)
|
|
#
|
|
# Each of these patterns come from AArch64GenGlobalISel.inc.
|
|
#
|
|
|
|
...
|
|
---
|
|
name: rev64_REV64v2i32
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $d0
|
|
; CHECK-LABEL: name: rev64_REV64v2i32
|
|
; CHECK: liveins: $d0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %copy:fpr64 = COPY $d0
|
|
; CHECK-NEXT: %rev:fpr64 = REV64v2i32 %copy
|
|
; CHECK-NEXT: $d0 = COPY %rev
|
|
; CHECK-NEXT: RET_ReallyLR implicit $d0
|
|
%copy:fpr(<2 x s32>) = COPY $d0
|
|
%rev:fpr(<2 x s32>) = G_REV64 %copy
|
|
$d0 = COPY %rev(<2 x s32>)
|
|
RET_ReallyLR implicit $d0
|
|
|
|
...
|
|
---
|
|
name: rev64_REV64v4i16
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $d0
|
|
; CHECK-LABEL: name: rev64_REV64v4i16
|
|
; CHECK: liveins: $d0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %copy:fpr64 = COPY $d0
|
|
; CHECK-NEXT: %rev:fpr64 = REV64v4i16 %copy
|
|
; CHECK-NEXT: $d0 = COPY %rev
|
|
; CHECK-NEXT: RET_ReallyLR implicit $d0
|
|
%copy:fpr(<4 x s16>) = COPY $d0
|
|
%rev:fpr(<4 x s16>) = G_REV64 %copy
|
|
$d0 = COPY %rev(<4 x s16>)
|
|
RET_ReallyLR implicit $d0
|
|
|
|
...
|
|
---
|
|
name: rev64_REV64v4i32
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $q0
|
|
; CHECK-LABEL: name: rev64_REV64v4i32
|
|
; CHECK: liveins: $q0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %copy:fpr128 = COPY $q0
|
|
; CHECK-NEXT: %rev:fpr128 = REV64v4i32 %copy
|
|
; CHECK-NEXT: $q0 = COPY %rev
|
|
; CHECK-NEXT: RET_ReallyLR implicit $q0
|
|
%copy:fpr(<4 x s32>) = COPY $q0
|
|
%rev:fpr(<4 x s32>) = G_REV64 %copy
|
|
$q0 = COPY %rev(<4 x s32>)
|
|
RET_ReallyLR implicit $q0
|
|
|
|
...
|
|
---
|
|
name: rev64_REV64v8i8
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $q0
|
|
; CHECK-LABEL: name: rev64_REV64v8i8
|
|
; CHECK: liveins: $q0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %copy:fpr64 = COPY $d0
|
|
; CHECK-NEXT: %rev:fpr64 = REV64v8i8 %copy
|
|
; CHECK-NEXT: $d0 = COPY %rev
|
|
; CHECK-NEXT: RET_ReallyLR implicit $d0
|
|
%copy:fpr(<8 x s8>) = COPY $d0
|
|
%rev:fpr(<8 x s8>) = G_REV64 %copy
|
|
$d0 = COPY %rev(<8 x s8>)
|
|
RET_ReallyLR implicit $d0
|
|
|
|
...
|
|
---
|
|
name: rev64_REV64v8i16
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $q0
|
|
; CHECK-LABEL: name: rev64_REV64v8i16
|
|
; CHECK: liveins: $q0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %copy:fpr128 = COPY $q0
|
|
; CHECK-NEXT: %rev:fpr128 = REV64v8i16 %copy
|
|
; CHECK-NEXT: $q0 = COPY %rev
|
|
; CHECK-NEXT: RET_ReallyLR implicit $q0
|
|
%copy:fpr(<8 x s16>) = COPY $q0
|
|
%rev:fpr(<8 x s16>) = G_REV64 %copy
|
|
$q0 = COPY %rev(<8 x s16>)
|
|
RET_ReallyLR implicit $q0
|
|
|
|
...
|
|
---
|
|
name: rev64_REV64v16i8
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $q0
|
|
; CHECK-LABEL: name: rev64_REV64v16i8
|
|
; CHECK: liveins: $q0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %copy:fpr128 = COPY $q0
|
|
; CHECK-NEXT: %rev:fpr128 = REV64v16i8 %copy
|
|
; CHECK-NEXT: $q0 = COPY %rev
|
|
; CHECK-NEXT: RET_ReallyLR implicit $q0
|
|
%copy:fpr(<16 x s8>) = COPY $q0
|
|
%rev:fpr(<16 x s8>) = G_REV64 %copy
|
|
$q0 = COPY %rev(<16 x s8>)
|
|
RET_ReallyLR implicit $q0
|
|
|
|
...
|
|
---
|
|
name: rev32_REV32v4i16
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $d0
|
|
; CHECK-LABEL: name: rev32_REV32v4i16
|
|
; CHECK: liveins: $d0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %copy:fpr64 = COPY $d0
|
|
; CHECK-NEXT: %rev:fpr64 = REV32v4i16 %copy
|
|
; CHECK-NEXT: $d0 = COPY %rev
|
|
; CHECK-NEXT: RET_ReallyLR implicit $d0
|
|
%copy:fpr(<4 x s16>) = COPY $d0
|
|
%rev:fpr(<4 x s16>) = G_REV32 %copy
|
|
$d0 = COPY %rev(<4 x s16>)
|
|
RET_ReallyLR implicit $d0
|
|
|
|
...
|
|
---
|
|
name: rev32_REV32v8i8
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $d0
|
|
; CHECK-LABEL: name: rev32_REV32v8i8
|
|
; CHECK: liveins: $d0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %copy:fpr64 = COPY $d0
|
|
; CHECK-NEXT: %rev:fpr64 = REV32v8i8 %copy
|
|
; CHECK-NEXT: $d0 = COPY %rev
|
|
; CHECK-NEXT: RET_ReallyLR implicit $d0
|
|
%copy:fpr(<8 x s8>) = COPY $d0
|
|
%rev:fpr(<8 x s8>) = G_REV32 %copy
|
|
$d0 = COPY %rev(<8 x s8>)
|
|
RET_ReallyLR implicit $d0
|
|
|
|
...
|
|
---
|
|
name: rev32_REV32v8i16
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $q0
|
|
; CHECK-LABEL: name: rev32_REV32v8i16
|
|
; CHECK: liveins: $q0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %copy:fpr128 = COPY $q0
|
|
; CHECK-NEXT: %rev:fpr128 = REV32v8i16 %copy
|
|
; CHECK-NEXT: $q0 = COPY %rev
|
|
; CHECK-NEXT: RET_ReallyLR implicit $q0
|
|
%copy:fpr(<8 x s16>) = COPY $q0
|
|
%rev:fpr(<8 x s16>) = G_REV32 %copy
|
|
$q0 = COPY %rev(<8 x s16>)
|
|
RET_ReallyLR implicit $q0
|
|
|
|
...
|
|
---
|
|
name: rev32_REV32v16i8
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $q0
|
|
; CHECK-LABEL: name: rev32_REV32v16i8
|
|
; CHECK: liveins: $q0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %copy:fpr128 = COPY $q0
|
|
; CHECK-NEXT: %rev:fpr128 = REV32v16i8 %copy
|
|
; CHECK-NEXT: $q0 = COPY %rev
|
|
; CHECK-NEXT: RET_ReallyLR implicit $q0
|
|
%copy:fpr(<16 x s8>) = COPY $q0
|
|
%rev:fpr(<16 x s8>) = G_REV32 %copy
|
|
$q0 = COPY %rev(<16 x s8>)
|
|
RET_ReallyLR implicit $q0
|
|
|
|
...
|
|
---
|
|
name: rev16_REV16v8i8
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $q0
|
|
; CHECK-LABEL: name: rev16_REV16v8i8
|
|
; CHECK: liveins: $q0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %copy:fpr64 = COPY $d0
|
|
; CHECK-NEXT: %rev2:fpr64 = REV16v8i8 %copy
|
|
; CHECK-NEXT: $d0 = COPY %rev2
|
|
; CHECK-NEXT: RET_ReallyLR implicit $d0
|
|
%copy:fpr(<8 x s8>) = COPY $d0
|
|
%rev1:fpr(<4 x s16>) = G_BITCAST %copy
|
|
%rev2:fpr(<4 x s16>) = G_BSWAP %rev1
|
|
%rev:fpr(<8 x s8>) = G_BITCAST %rev2
|
|
$d0 = COPY %rev(<8 x s8>)
|
|
RET_ReallyLR implicit $d0
|
|
|
|
...
|
|
---
|
|
name: rev16_REV16v16i8
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $q0
|
|
; CHECK-LABEL: name: rev16_REV16v16i8
|
|
; CHECK: liveins: $q0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: %copy:fpr128 = COPY $q0
|
|
; CHECK-NEXT: %rev2:fpr128 = REV16v16i8 %copy
|
|
; CHECK-NEXT: $q0 = COPY %rev2
|
|
; CHECK-NEXT: RET_ReallyLR implicit $q0
|
|
%copy:fpr(<16 x s8>) = COPY $q0
|
|
%rev1:fpr(<8 x s16>) = G_BITCAST %copy
|
|
%rev2:fpr(<8 x s16>) = G_BSWAP %rev1
|
|
%rev:fpr(<16 x s8>) = G_BITCAST %rev2
|
|
$q0 = COPY %rev(<16 x s8>)
|
|
RET_ReallyLR implicit $q0
|