derek.holloway
7502bf64a4
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364 lines
13 KiB
YAML
364 lines
13 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-FAST
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# RUN: llc -mtriple=aarch64-unknown-unknown -mattr=+addr-lsl-slow-14 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SLOW
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--- |
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define void @strxrox(ptr %addr) { ret void }
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define void @strxrox_p0(ptr %addr) { ret void }
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define void @strdrox(ptr %addr) { ret void }
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define void @strwrox(ptr %addr) { ret void }
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define void @strsrox(ptr %addr) { ret void }
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define void @strhrox(ptr %addr) { ret void }
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define void @strqrox(ptr %addr) { ret void }
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define void @shl_fast_3(ptr %addr) { ret void }
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define void @shl_slow_1(ptr %addr) { ret void }
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define void @shl_slow_1_more_than_one_use(ptr %addr) { ret void }
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define void @shl_slow_4(ptr %addr) { ret void }
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define void @shl_slow_4_more_than_one_use(ptr %addr) { ret void }
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define void @shl_p0(ptr %addr) { ret void }
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...
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---
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name: strxrox
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $x2
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; CHECK-LABEL: name: strxrox
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; CHECK: liveins: $x0, $x1, $x2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
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; CHECK-NEXT: STRXroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (s64) into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%3:gpr(s64) = COPY $x2
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G_STORE %3, %ptr :: (store (s64) into %ir.addr)
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...
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---
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name: strxrox_p0
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $x2
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; CHECK-LABEL: name: strxrox_p0
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; CHECK: liveins: $x0, $x1, $x2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64all = COPY $x2
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY [[COPY2]]
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; CHECK-NEXT: STRXroX [[COPY3]], [[COPY]], [[COPY1]], 0, 0 :: (store (p0) into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%3:gpr(p0) = COPY $x2
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G_STORE %3, %ptr :: (store (p0) into %ir.addr)
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...
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---
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name: strdrox
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $d2
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; CHECK-LABEL: name: strdrox
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; CHECK: liveins: $x0, $x1, $d2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY $d2
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; CHECK-NEXT: STRDroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (s64) into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%3:fpr(s64) = COPY $d2
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G_STORE %3, %ptr :: (store (s64) into %ir.addr)
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...
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---
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name: strwrox
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $w2
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; CHECK-LABEL: name: strwrox
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; CHECK: liveins: $x0, $x1, $w2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
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; CHECK-NEXT: STRWroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (s32) into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%3:gpr(s32) = COPY $w2
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G_STORE %3, %ptr :: (store (s32) into %ir.addr)
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...
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---
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name: strsrox
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $s2
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; CHECK-LABEL: name: strsrox
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; CHECK: liveins: $x0, $x1, $s2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr32 = COPY $s2
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; CHECK-NEXT: STRSroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (s32) into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%3:fpr(s32) = COPY $s2
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G_STORE %3, %ptr :: (store (s32) into %ir.addr)
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...
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---
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name: strhrox
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $h0
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; CHECK-LABEL: name: strhrox
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; CHECK: liveins: $x0, $x1, $h0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr16 = COPY $h0
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; CHECK-NEXT: STRHroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (s16) into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%3:fpr(s16) = COPY $h0
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G_STORE %3, %ptr :: (store (s16) into %ir.addr)
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...
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---
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name: strqrox
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $q2
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; CHECK-LABEL: name: strqrox
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; CHECK: liveins: $x0, $x1, $q2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr128 = COPY $q2
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; CHECK-NEXT: STRQroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (<2 x s64>) into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %0, %1
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%2:fpr(<2 x s64>) = COPY $q2
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G_STORE %2, %ptr :: (store (<2 x s64>) into %ir.addr)
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...
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---
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name: shl_fast_3
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $x2
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; CHECK-LABEL: name: shl_fast_3
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; CHECK: liveins: $x0, $x1, $x2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
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; CHECK-NEXT: STRXroX [[COPY2]], [[COPY1]], [[COPY]], 0, 1 :: (store (s64) into %ir.addr)
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 3
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%2:gpr(s64) = G_SHL %0, %1(s64)
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%3:gpr(p0) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %3, %2
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%4:gpr(s64) = COPY $x2
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G_STORE %4, %ptr :: (store (s64) into %ir.addr)
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...
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---
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name: shl_slow_1
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $x2
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; CHECK-LABEL: name: shl_slow_1
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; CHECK: liveins: $x0, $x1, $x2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY [[COPY2]].sub_32
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; CHECK-NEXT: STRHHroX [[COPY3]], [[COPY1]], [[COPY]], 0, 1 :: (store (s16) into %ir.addr)
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 1
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%2:gpr(s64) = G_SHL %0, %1(s64)
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%3:gpr(p0) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %3, %2
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%4:gpr(s64) = COPY $x2
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G_STORE %4, %ptr :: (store (s16) into %ir.addr)
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...
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---
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name: shl_slow_1_more_than_one_use
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $x2
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; CHECK-FAST-LABEL: name: shl_slow_1_more_than_one_use
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; CHECK-FAST: liveins: $x0, $x1, $x2
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; CHECK-FAST-NEXT: {{ $}}
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; CHECK-FAST-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-FAST-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x1
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; CHECK-FAST-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
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; CHECK-FAST-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY [[COPY2]].sub_32
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; CHECK-FAST-NEXT: STRHHroX [[COPY3]], [[COPY1]], [[COPY]], 0, 1 :: (store (s16) into %ir.addr)
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; CHECK-FAST-NEXT: [[COPY4:%[0-9]+]]:gpr32 = COPY [[COPY2]].sub_32
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; CHECK-FAST-NEXT: STRHHroX [[COPY4]], [[COPY1]], [[COPY]], 0, 1 :: (store (s16) into %ir.addr)
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;
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; CHECK-SLOW-LABEL: name: shl_slow_1_more_than_one_use
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; CHECK-SLOW: liveins: $x0, $x1, $x2
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; CHECK-SLOW-NEXT: {{ $}}
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; CHECK-SLOW-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-SLOW-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-SLOW-NEXT: %ptr:gpr64common = ADDXrs [[COPY1]], [[COPY]], 1
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; CHECK-SLOW-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
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; CHECK-SLOW-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY [[COPY2]].sub_32
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; CHECK-SLOW-NEXT: STRHHui [[COPY3]], %ptr, 0 :: (store (s16) into %ir.addr)
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; CHECK-SLOW-NEXT: [[COPY4:%[0-9]+]]:gpr32 = COPY [[COPY2]].sub_32
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; CHECK-SLOW-NEXT: STRHHui [[COPY4]], %ptr, 0 :: (store (s16) into %ir.addr)
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 1
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%2:gpr(s64) = G_SHL %0, %1(s64)
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%3:gpr(p0) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %3, %2
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%4:gpr(s64) = COPY $x2
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%5:gpr(s16) = G_TRUNC %4
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G_STORE %4, %ptr :: (store (s16) into %ir.addr)
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G_STORE %4, %ptr :: (store (s16) into %ir.addr)
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...
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---
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name: shl_slow_4
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $x2, $q0
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; CHECK-LABEL: name: shl_slow_4
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; CHECK: liveins: $x0, $x1, $x2, $q0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr128 = COPY $q0
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; CHECK-NEXT: STRQroX [[COPY2]], [[COPY1]], [[COPY]], 0, 1 :: (store (s128) into %ir.addr)
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = G_CONSTANT i64 4
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%2:gpr(s64) = G_SHL %0, %1(s64)
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%3:gpr(p0) = COPY $x1
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%ptr:gpr(p0) = G_PTR_ADD %3, %2
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%5:fpr(s128) = COPY $q0
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G_STORE %5, %ptr :: (store (s128) into %ir.addr)
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...
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---
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name: shl_slow_4_more_than_one_use
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0, $x1, $x2, $q0
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; CHECK-FAST-LABEL: name: shl_slow_4_more_than_one_use
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; CHECK-FAST: liveins: $x0, $x1, $x2, $q0
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; CHECK-FAST-NEXT: {{ $}}
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; CHECK-FAST-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-FAST-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x1
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; CHECK-FAST-NEXT: [[COPY2:%[0-9]+]]:fpr128 = COPY $q0
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; CHECK-FAST-NEXT: STRQroX [[COPY2]], [[COPY1]], [[COPY]], 0, 1 :: (store (s128) into %ir.addr)
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; CHECK-FAST-NEXT: STRQroX [[COPY2]], [[COPY1]], [[COPY]], 0, 1 :: (store (s128) into %ir.addr)
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;
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; CHECK-SLOW-LABEL: name: shl_slow_4_more_than_one_use
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; CHECK-SLOW: liveins: $x0, $x1, $x2, $q0
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; CHECK-SLOW-NEXT: {{ $}}
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; CHECK-SLOW-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-SLOW-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-SLOW-NEXT: %ptr:gpr64common = ADDXrs [[COPY1]], [[COPY]], 4
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; CHECK-SLOW-NEXT: [[COPY2:%[0-9]+]]:fpr128 = COPY $q0
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; CHECK-SLOW-NEXT: STRQui [[COPY2]], %ptr, 0 :: (store (s128) into %ir.addr)
|
|
; CHECK-SLOW-NEXT: STRQui [[COPY2]], %ptr, 0 :: (store (s128) into %ir.addr)
|
|
%0:gpr(s64) = COPY $x0
|
|
%1:gpr(s64) = G_CONSTANT i64 4
|
|
%2:gpr(s64) = G_SHL %0, %1(s64)
|
|
%3:gpr(p0) = COPY $x1
|
|
%ptr:gpr(p0) = G_PTR_ADD %3, %2
|
|
%5:fpr(s128) = COPY $q0
|
|
G_STORE %5, %ptr :: (store (s128) into %ir.addr)
|
|
G_STORE %5, %ptr :: (store (s128) into %ir.addr)
|
|
...
|
|
---
|
|
name: shl_p0
|
|
alignment: 4
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
bb.0:
|
|
liveins: $x0, $x1, $x2
|
|
; CHECK-LABEL: name: shl_p0
|
|
; CHECK: liveins: $x0, $x1, $x2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x1
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64all = COPY $x2
|
|
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY [[COPY2]]
|
|
; CHECK-NEXT: STRXroX [[COPY3]], [[COPY1]], [[COPY]], 0, 1 :: (store (p0) into %ir.addr)
|
|
%0:gpr(s64) = COPY $x0
|
|
%1:gpr(s64) = G_CONSTANT i64 3
|
|
%2:gpr(s64) = G_SHL %0, %1(s64)
|
|
%3:gpr(p0) = COPY $x1
|
|
%ptr:gpr(p0) = G_PTR_ADD %3, %2
|
|
%4:gpr(p0) = COPY $x2
|
|
G_STORE %4, %ptr :: (store (p0) into %ir.addr)
|
|
...
|