derek.holloway
7502bf64a4
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209 lines
6.6 KiB
YAML
209 lines
6.6 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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#
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# Test using the xro addressing mode with immediates. This should be done for
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# wide constants which are preferably selected using a mov rather than an add.
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...
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---
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name: use_xro_cannot_encode_add_lsl
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; Check that we use the XRO addressing mode when the constant cannot be
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; represented using an add + lsl.
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; cst = 0000000111000000
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; cst & 000fffffff000000 != 0
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; CHECK-LABEL: name: use_xro_cannot_encode_add_lsl
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64sp = COPY $x0
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; CHECK-NEXT: %cst:gpr64 = MOVi64imm 4580179968
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; CHECK-NEXT: %load:gpr64 = LDRXroX %copy, %cst, 0, 0 :: (volatile load (s64))
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; CHECK-NEXT: RET_ReallyLR
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%copy:gpr(p0) = COPY $x0
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%cst:gpr(s64) = G_CONSTANT i64 4580179968
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%addr:gpr(p0) = G_PTR_ADD %copy, %cst(s64)
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%load:gpr(s64) = G_LOAD %addr(p0) :: (volatile load (s64))
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RET_ReallyLR
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...
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---
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name: use_xro_preferred_mov
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; Check that we use the XRO addressing mode when the constant can be
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; represented using a single movk.
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; cst = 000000000000f000
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; cst & 000fffffff000000 == 0
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; cst & ffffffffffff0fff != 0
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; CHECK-LABEL: name: use_xro_preferred_mov
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64sp = COPY $x0
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; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 61440
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; CHECK-NEXT: %cst:gpr64 = SUBREG_TO_REG [[MOVi32imm]], %subreg.sub_32
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; CHECK-NEXT: %load:gpr64 = LDRXroX %copy, %cst, 0, 0 :: (volatile load (s64))
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; CHECK-NEXT: RET_ReallyLR
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%copy:gpr(p0) = COPY $x0
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%cst:gpr(s64) = G_CONSTANT i64 61440
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%addr:gpr(p0) = G_PTR_ADD %copy, %cst(s64)
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%load:gpr(s64) = G_LOAD %addr(p0) :: (volatile load (s64))
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RET_ReallyLR
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...
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---
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name: use_xro_negative_imm
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; Check that this works even if we have a negative immediate.
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; CHECK-LABEL: name: use_xro_negative_imm
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64sp = COPY $x0
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; CHECK-NEXT: %cst:gpr64 = MOVi64imm -61440
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; CHECK-NEXT: %load:gpr64 = LDRXroX %copy, %cst, 0, 0 :: (volatile load (s64))
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; CHECK-NEXT: RET_ReallyLR
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%copy:gpr(p0) = COPY $x0
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%cst:gpr(s64) = G_CONSTANT i64 -61440
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%addr:gpr(p0) = G_PTR_ADD %copy, %cst(s64)
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%load:gpr(s64) = G_LOAD %addr(p0) :: (volatile load (s64))
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RET_ReallyLR
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...
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---
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name: dont_use_xro_selectable_imm
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; Immediates that can be encoded in a LDRXui should be skipped.
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; CHECK-LABEL: name: dont_use_xro_selectable_imm
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64sp = COPY $x0
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; CHECK-NEXT: %load:gpr64 = LDRXui %copy, 2 :: (volatile load (s64))
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; CHECK-NEXT: RET_ReallyLR
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%copy:gpr(p0) = COPY $x0
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%cst:gpr(s64) = G_CONSTANT i64 16
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%addr:gpr(p0) = G_PTR_ADD %copy, %cst(s64)
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%load:gpr(s64) = G_LOAD %addr(p0) :: (volatile load (s64))
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RET_ReallyLR
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...
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---
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name: dont_use_xro_selectable_negative_imm
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; Immediates that can be encoded in a LDRXui should be skipped.
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; CHECK-LABEL: name: dont_use_xro_selectable_negative_imm
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64sp = COPY $x0
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; CHECK-NEXT: %load:gpr64 = LDURXi %copy, -16 :: (volatile load (s64))
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; CHECK-NEXT: RET_ReallyLR
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%copy:gpr(p0) = COPY $x0
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%cst:gpr(s64) = G_CONSTANT i64 -16
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%addr:gpr(p0) = G_PTR_ADD %copy, %cst(s64)
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%load:gpr(s64) = G_LOAD %addr(p0) :: (volatile load (s64))
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RET_ReallyLR
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...
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---
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name: dont_use_xro_zero
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; Immediates that can be encoded in a LDRXui should be skipped.
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; CHECK-LABEL: name: dont_use_xro_zero
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64sp = COPY $x0
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; CHECK-NEXT: %load:gpr64 = LDRXui %copy, 0 :: (volatile load (s64))
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; CHECK-NEXT: RET_ReallyLR
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%copy:gpr(p0) = COPY $x0
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%cst:gpr(s64) = G_CONSTANT i64 0
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%addr:gpr(p0) = G_PTR_ADD %copy, %cst(s64)
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%load:gpr(s64) = G_LOAD %addr(p0) :: (volatile load (s64))
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RET_ReallyLR
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...
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---
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name: dont_use_xro_in_range
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; Check that we skip constants which can be encoded in an add.
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; 17 is in [0x0, 0xfff]
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; CHECK-LABEL: name: dont_use_xro_in_range
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64sp = COPY $x0
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; CHECK-NEXT: %load:gpr64 = LDURXi %copy, 17 :: (volatile load (s64))
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; CHECK-NEXT: RET_ReallyLR
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%copy:gpr(p0) = COPY $x0
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%cst:gpr(s64) = G_CONSTANT i64 17
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%addr:gpr(p0) = G_PTR_ADD %copy, %cst(s64)
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%load:gpr(s64) = G_LOAD %addr(p0) :: (volatile load (s64))
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RET_ReallyLR
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...
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---
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name: dont_use_xro_add_lsl
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; Check that we skip when we have an add with an lsl which cannot be
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; represented as a movk.
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; cst = 0x0000000000111000
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; cst & 000fffffff000000 = 0
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; cst & ffffffffff00ffff != 0
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; cst & ffffffffffff0fff != 0
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; CHECK-LABEL: name: dont_use_xro_add_lsl
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %copy:gpr64 = COPY $x0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY %copy
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; CHECK-NEXT: %addr:gpr64sp = ADDXri [[COPY]], 273, 12
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; CHECK-NEXT: %load:gpr64 = LDRXui %addr, 0 :: (volatile load (s64))
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; CHECK-NEXT: RET_ReallyLR
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%copy:gpr(p0) = COPY $x0
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%cst:gpr(s64) = G_CONSTANT i64 1118208
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%addr:gpr(p0) = G_PTR_ADD %copy, %cst(s64)
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%load:gpr(s64) = G_LOAD %addr(p0) :: (volatile load (s64))
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RET_ReallyLR
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